From 6973ec73d962758a3553cd8a567cb84aeb748054 Mon Sep 17 00:00:00 2001
From: sakumisu <1203593632@qq.com>
Date: Wed, 4 Jun 2025 16:16:51 +0800
Subject: update(cherryusb_config_template): update align size

Signed-off-by: sakumisu <1203593632@qq.com>
---
 cherryusb_config_template.h | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/cherryusb_config_template.h b/cherryusb_config_template.h
index 5f46c1c0..8485b894 100644
--- a/cherryusb_config_template.h
+++ b/cherryusb_config_template.h
@@ -23,13 +23,15 @@
 /* Enable print with color */
 #define CONFIG_USB_PRINTF_COLOR_ENABLE
 
+// #define CONFIG_USB_DCACHE_ENABLE
+
 /* data align size when use dma or use dcache */
-#ifndef CONFIG_USB_ALIGN_SIZE
+#ifdef CONFIG_USB_DCACHE_ENABLE
+#define CONFIG_USB_ALIGN_SIZE 32 // 32 or 64
+#else
 #define CONFIG_USB_ALIGN_SIZE 4
 #endif
 
-// #define CONFIG_USB_DCACHE_ENABLE
-
 /* attribute data into no cache ram */
 #define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable")))
 
@@ -332,11 +334,6 @@
 /* ---------------- MUSB Configuration ---------------- */
 // #define CONFIG_USB_MUSB_SUNXI
 
-/* ================ USB Dcache Configuration ==================*/
-// #define CONFIG_USB_DCACHE_ENABLE
-// #undef CONFIG_USB_ALIGN_SIZE
-// #define CONFIG_USB_ALIGN_SIZE 32
-
 #ifndef usb_phyaddr2ramaddr
 #define usb_phyaddr2ramaddr(addr) (addr)
 #endif
-- 
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