<feed xmlns='http://www.w3.org/2005/Atom'>
<title>opensbi.git, branch v1.3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/?h=v1.3</id>
<link rel='self' href='http://cgit.235523.xyz/opensbi.git/atom/?h=v1.3'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/'/>
<updated>2023-06-23T05:31:49Z</updated>
<entry>
<title>include: Bump-up version to 1.3</title>
<updated>2023-06-23T05:31:49Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-06-23T05:31:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=2552799a1df30a3dcd2321a8b75d61d06f5fb9fc'/>
<id>urn:sha1:2552799a1df30a3dcd2321a8b75d61d06f5fb9fc</id>
<content type='text'>
This patch updates OpenSBI version to 1.3 as part of
release preparation.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: check A2 register in ecall_dbcn_handler.</title>
<updated>2023-06-23T03:16:07Z</updated>
<author>
<name>Gianluca Guida</name>
<email>gianluca@rivosinc.com</email>
</author>
<published>2023-06-22T17:38:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=8bd666a25b543ba391ae6ee81c1a2469e95c4a05'/>
<id>urn:sha1:8bd666a25b543ba391ae6ee81c1a2469e95c4a05</id>
<content type='text'>
Do not ignore register A2 (high bits of physical address) in the dbcn
handler (RV64).

Signed-off-by: Gianluca Guida &lt;gianluca@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: reset: Move fdt_reset_init into generic_early_init</title>
<updated>2023-06-21T05:42:42Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2023-06-18T15:07:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=27c957a43b030523baf931a3b8ef002418fb27ad'/>
<id>urn:sha1:27c957a43b030523baf931a3b8ef002418fb27ad</id>
<content type='text'>
The fdt_reset_thead driver needs to modify the __reset_thead_csr_stub
text region for the secondary harts booting. After that, the
sbi_hart_pmp_configure may lock down the text region with M_READABLE &amp;
M_EXECUTABLE attributes in the future. Currently, the M_READABLE &amp;
M_EXECUtABLE have no effect on m-mode, the L-bit in pmpcfg csr is
useless for the current opensbi scenario. See:

Priv-isa-spec 3.7.1.2. Locking and Privilege Mode
When the L bit is clear, any M-mode access matching the PMP entry will
succeed; the R/W/X permissions apply only to S and U modes.

That's why current fdt_reset_thead could still work well after commit:
230278dcf127 ("lib: sbi: Add separate entries for firmware RX and RW
regions"). So this patch fixes up a fake bug for the M-mode permission
setting of the future.

Fixes: 230278dcf127 ("lib: sbi: Add separate entries for firmware RX and RW regions")
Link: http://lists.infradead.org/pipermail/opensbi/2023-June/005176.html
Reported-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Fix find hart index</title>
<updated>2023-06-21T04:50:51Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2023-06-16T07:03:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=d64942f0e4fe63a248e7ba3dd7ff4dec02954134'/>
<id>urn:sha1:d64942f0e4fe63a248e7ba3dd7ff4dec02954134</id>
<content type='text'>
After the loop to find the hartid is launched, assigning -1 to
index will fail in the subsequent compare instruction bge. Fix
This.

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform/lib: Set no-map attribute on all PMP regions</title>
<updated>2023-06-15T12:57:17Z</updated>
<author>
<name>Alexandre Ghiti</name>
<email>alexghiti@rivosinc.com</email>
</author>
<published>2023-06-14T08:20:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=8153b2622b08802cc542f30a1fcba407a5667ab9'/>
<id>urn:sha1:8153b2622b08802cc542f30a1fcba407a5667ab9</id>
<content type='text'>
This reverts commit 6966ad0abe70 ("platform/lib: Allow the OS to map the
regions that are protected by PMP").

It was thought at the time of this commit that allowing the kernel to map
PMP protected regions was safe but it is actually not: for example, the
hibernation process will try to access any linear mapping page and then
will fault on such mapped PMP regions [1]. Another issue is that the
device tree specification [2] states that a !no-map region must be
declared as EfiBootServicesData/Code in the EFI memory map which would make
the PMP protected regions reclaimable by the kernel. And to circumvent
this, RISC-V edk2 diverges from the DT specification to declare those
regions as EfiReserved.

The no-map attribute was removed to allow the kernel to use hugepages
larger than 2MB to map the linear mapping to improve the performance but
actually a recent talk from Mike Rapoport [3] stated that the
performance benefit was marginal.

For all those reasons, let's mark all the PMP protected regions as "no-map".

[1] https://lore.kernel.org/linux-riscv/CAAYs2=gQvkhTeioMmqRDVGjdtNF_vhB+vm_1dHJxPNi75YDQ_Q@mail.gmail.com/
[2] "3.5.4 /reserved-memory and UEFI" https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4-rc1/devicetree-specification-v0.4-rc1.pdf
[3] https://lwn.net/Articles/931406/

Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>README.md: Improve project copyright information</title>
<updated>2023-06-14T05:56:06Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-06-09T11:59:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=932be2cde1b0f38c676bddaf801fa1030f9e9065'/>
<id>urn:sha1:932be2cde1b0f38c676bddaf801fa1030f9e9065</id>
<content type='text'>
Over-time a lot of organizations and individuals have contributed to
the OpenSBI project so let us add copyright RISC-V International to
respect the contributions from all RISC-V members.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>docs: Add OpenSBI logo and use it in the top-level README.md</title>
<updated>2023-06-14T05:56:04Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-06-09T11:51:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=524feec7b74aa4079999af13ba4daf73b423f28a'/>
<id>urn:sha1:524feec7b74aa4079999af13ba4daf73b423f28a</id>
<content type='text'>
We do have an official OpenSBI logo which was designed few months ago
and was also approved by RISC-V International. Lets add this logo
under docs and also use it in the top-level README.md

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Use scratch space to save per-HART IMSIC pointer</title>
<updated>2023-06-06T10:31:14Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-04-20T04:48:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=355796c5bc1906d749850e4215e0f7f53802ba5b'/>
<id>urn:sha1:355796c5bc1906d749850e4215e0f7f53802ba5b</id>
<content type='text'>
Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART IMSIC pointer and IMSIC file number.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Don't check hartid in imsic_update_hartid_table()</title>
<updated>2023-06-05T11:21:07Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-04-20T04:44:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=1df52fa7e8db2c23a921014404bd472d20ca42e8'/>
<id>urn:sha1:1df52fa7e8db2c23a921014404bd472d20ca42e8</id>
<content type='text'>
The imsic_map_hartid_to_data() already checks hartid before using
so we don't need to check in imsic_update_hartid_table().

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Use scratch space to save per-HART PLIC pointer</title>
<updated>2023-06-05T11:20:56Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-04-19T15:59:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=b3594ac1d10ef6c7269c6381a1e826b73b06aca0'/>
<id>urn:sha1:b3594ac1d10ef6c7269c6381a1e826b73b06aca0</id>
<content type='text'>
Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART PLIC pointer and PLIC context numbers.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
</content>
</entry>
</feed>
