opensbi.git, branch v1.7

include: Bump-up version to 1.7

2025-06-30T03:07:30Z

Update the OpenSBI version to 1.7 as part of release preparation. Signed-off-by: Anup Patel Signed-off-by: Anup Patel

lib: rpmi: Make RPMI drivers as non-experimental

2025-06-24T03:12:27Z

As RPMI v1.0 specification is frozen, disable the experimental tag for such RPMI drivers. Signed-off-by: Rahul Pathak Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250618053854.2577299-2-rpathak@ventanamicro.com Signed-off-by: Anup Patel

lib: utils: Add Implementation ID and Version as RPMI MPXY attributes

2025-06-24T03:12:27Z

The latest frozen RPMI spec has added Implementation ID and Implementation Version as message protocol specific mpxy attributes. Add support for these. Signed-off-by: Rahul Pathak Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250618053854.2577299-1-rpathak@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi_platform: Add platform specific pmp_set() and pmp_disable()

2025-06-17T04:04:01Z

Allow platforms to implement platform specific PMP setup and PMP disable functions which are called before actual PMP CSRs are configured. Also, implement pmp_set() and pmp_disable() for MIPS P8700. Signed-off-by: Chao-ying Fu Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250614172756.153902-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: dbtr: Fix update_triggers to match SBI

2025-06-16T11:31:52Z

OpenSBI implements sbi_dbtr_update_trig as `sbi_dbtr_update_trig(unsigned long trig_idx_base, unsigned long trig_idx_mask)` yet SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] declares it as `sbi_debug_update_triggers(unsigned long trig_count)` Change update_triggers to match SBI. [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support") Signed-off-by: Jesse Taube Reviewed-by: Himanshu Chauhan Tested-by: Charlie Jenkins Reviewed-by: Charlie Jenkins Link: https://lore.kernel.org/r/20250528154604.571815-1-jesse@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: Optimize saddr mapping in sbi_dbtr.c

2025-06-16T11:23:50Z

The original implementation mapped saddr individually for each entry. The updated code now maps saddr for all entries in a single operation. This change reduces the number of PMP (Physical Memory Protection) operations, improving efficiency and performance. Tested-by: Himanshu Chauhan Reviewed-by: Himanshu Chauhan Signed-off-by: Xiang W Link: https://lore.kernel.org/r/20250514052422.575551-1-wxjstz@126.com Signed-off-by: Anup Patel

lib: sbi: dbtr: Fix shared memory layout

2025-06-16T04:44:20Z

The existing sbi_dbtr_shmem_entry has a size of 5 * XLEN with the final entry being idx. This is in contrast to the SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] where idx and trig_state share the same offset (0) in shared memory, with a total size of 4 * XLEN for all the SBI calls. Replace struct with union to match memory layout described in SBI. [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support") Signed-off-by: Jesse Taube Reviewed-by: Charlie Jenkins Tested-by: Charlie Jenkins Reviewed-by: Himanshu Chauhan Tested-by: Himanshu Chauhan Link: https://lore.kernel.org/r/20250604135225.842241-1-jesse@rivosinc.com Signed-off-by: Anup Patel

lib: utils: Fix fdt_parse_aclint_node() for non-contiguous hartid

2025-06-16T04:11:03Z

Currently, the fdt_parse_aclint_node() does not handle non-contiguous hartid correctly and returns incorrect first_hartid and hart_count. This is because the for-loop in fdt_parse_aclint_node() skips a hartid for which hartindex is not available (aka corresponding CPU DT node is disabled). For example, on a platform with 4 HARTs (hartid 0, 1, 2, and 3) where CPU DT nodes with hartid 0 and 2 are disabled, the fdt_parse_aclint_node() returns first_hartid = 1 and hart_count = 3 which is incorrect. To address the above issue, drop the sbi_hartid_to_hartindex() check from the for-loop of fdt_parse_aclint_node(). Fixes: 5e90e54a1a53 ("lib: utils:Check that hartid is valid") Reported-by: Maria Mbaye Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250606055810.237441-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: Revert entry_count before doing hsm stop in hsm wait loop

2025-06-16T04:10:28Z

Using hsm stop in hsm wait loop causes secondary harts to be stuck forever in OpenSBI on RISC-V platforms where HSM hart hotplug is available and all harts come-up at the same time during system power-on. For example, lets say we have two harts A and B on a RISC-V platform with HSM hart hotplug which come-up at the same time during system power-on. The hart A enters OpenSBI before hart B hence it becomes the primary (or cold-boot) hart whereas hart B becomes the secondary (or warm-boot) hart. The hart A follows the OpenSBI cold-boot path and registers hsm device before hart B enters OpenSBI. The hart B eventually enters OpenSBI and follows the OpenSBI warm-boot path so it will increment it's own entry_count before entering hsm wait loop where it sees hsm device and stops itself. Later as part of the Linux boot-up sequence, hart A issues SBI HSM start call to bring-up hart B but OpenSBI sees entry_count != init_count for hart B in sbi_hsm_hart_start() hence hsm_device_hart_start() is not called for hart B resulting in hart B stuck forever in OpenSBI. To fix the above issue, revert entry_count before doing hsm stop in hsm wait loop. Fixes: d844deadec94 ("lib: sbi: Use hsm stop for hsm wait") Signed-off-by: Anup Patel Reviewed-by: Nick Hu Link: https://lore.kernel.org/r/20250527124821.2113467-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: utils/irqchip: always parse msi information for each aplic device

2025-06-16T03:47:28Z

OpenSBI only parses MSI information of the first next level subdomain for now, which makes the root domain misconfigured in some case: 1. the msi is not enabled on the first subdomain of the root domain, but other subdomains enable MSI. 2. the root domain is set as direct mode, but its subdomains enable MSI. So it is needed to parse all child of the root domain, Otherwise, the some non-root domains are broken. As the specification says, it is safe to parse the MSI information of all its subdomain and write the msiaddrcfg register of the non root domain as they are read only. Parse the aplic MSI information recursively for all aplic device. Reviewed-by: Anup Patel Signed-off-by: Inochi Amaoto Link: https://lore.kernel.org/r/20250523085348.1690368-1-inochiama@gmail.com Signed-off-by: Anup Patel