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<title>opensbi.git/firmware/fw_base.S, branch v1.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/firmware/fw_base.S?h=v1.2</id>
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<updated>2022-12-05T05:17:38Z</updated>
<entry>
<title>firmware: Minor optimization for relocate</title>
<updated>2022-12-05T05:17:38Z</updated>
<author>
<name>Dongdong Zhang</name>
<email>zhangdongdong@eswincomputing.com</email>
</author>
<published>2022-11-29T03:54:07Z</published>
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<id>urn:sha1:cfbabb9ec6ba4979411ff8050638ac2628806beb</id>
<content type='text'>
The t3 register stores the address of _load_end. If relocation is not
required, it is unnecessary to calculate the address of _load_end.

This can reduce the operation time of two instructions.

Signed-off-by: Dongdong Zhang &lt;zhangdongdong@eswincomputing.com&gt;
Reviewed-by: Bin Meng &lt;bmeng@tinylab.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Fix code for accessing hart_count and stack_size</title>
<updated>2022-03-27T03:23:27Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2022-03-15T16:22:39Z</published>
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<id>urn:sha1:b6b7220a47e19b422fb470cffb4675f0a70e94f3</id>
<content type='text'>
lwu exists under the current rv64 and should also exist under the rv128
in the future, so I modified the conditions of conditional compilation
so that it can adapt to the future situation

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Move memcpy/memset mapping to fw_base.S</title>
<updated>2021-12-23T12:16:09Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2021-12-22T12:31:23Z</published>
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<id>urn:sha1:d30bde36d5b7a7ad74176ddf9ede4d7eb2bca86b</id>
<content type='text'>
Some of the external firmwares using OpenSBI as library are facing
issues with the weak memcpy() and memset() aliases in libsbi.a so
we move these to fw_base.S. This way mapping of implicit memcpy()
or memset() calls to sbi_memcpy() or sbi_memset() will only be done
for OpenSBI firmwares.
(Refer, https://github.com/riscv-software-src/opensbi/issues/234)

In addition, we also add memmove() and memcmp() mappings in fw_base.S
because as-per the GCC documentation the freestanding environment must
provide memcpy(), memmove(), memset(), and memcmp().

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>firmware: use _fw_start for load address</title>
<updated>2021-07-27T09:50:49Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2021-07-14T07:14:39Z</published>
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<id>urn:sha1:74db0acbe5de8c82cc3ae050d6bd119f33dce4cf</id>
<content type='text'>
The previous code uses _start as the load address, this default .entry is
the first segment, using _fw_start does not need to make this assumption.

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>firmware: Remove the unhelpful alignment codes before fdt relocation</title>
<updated>2021-07-17T11:43:43Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2021-07-10T14:28:20Z</published>
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<id>urn:sha1:8a1475b5a1325547af7f428d4aed063d7a4007c7</id>
<content type='text'>
If the device tree is at an address that is not __SIZEOF_POINTER__
aligned, the fdt relocation code tries to align both source and
destination address to __SIZEOF_POINTER__ before the memory copy.
But such alignment can lead to unexpected results if either source
or destination address is not aligned.

In fact libfdt requires that the device tree must be at an 8-byte
aligned address. Hence remove the unhelpful alignment codes.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>fw_base: Put data in .data rather than .text</title>
<updated>2021-07-11T12:03:30Z</updated>
<author>
<name>Jessica Clarke</name>
<email>jrtc27@jrtc27.com</email>
</author>
<published>2021-07-11T02:28:20Z</published>
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<id>urn:sha1:397afe5ba1e9abeb48b801c864a56bda415441ce</id>
<content type='text'>
The -N linker option is supposed to make .text writable, but GNU ld and
LLD differ in interpreting what that means. GNU ld will happily let you
have relocations in it, but LLD will see that the input section is
read-only (even though the output section is writable) and give an
error. It's unclear if either of them intend to have that behaviour in
this edge case, but regardless there's no reason not to just put the
data in a writable .data section.

Signed-off-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>fw_base: Don't mark fw_platform_init as both global and weak</title>
<updated>2021-07-11T11:50:42Z</updated>
<author>
<name>Jessica Clarke</name>
<email>jrtc27@jrtc27.com</email>
</author>
<published>2021-07-11T02:28:19Z</published>
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<id>urn:sha1:7f1be8a624aca4805020588894d96c3617860c89</id>
<content type='text'>
These are mutually exclusive. GNU as and LLVM both let later binding
directives override earlier ones so this works as intended, but LLVM 12
turned this into a warning as there's no good reason to do such a thing
and could be a potential bug. Thus, remove the redundant and incorrect
.globl directive for fw_platform_init.

Signed-off-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>firmware: Minor optimization in _scratch_init()</title>
<updated>2021-07-11T06:11:50Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2021-07-10T14:00:31Z</published>
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<id>urn:sha1:14c7f71c0da641ece1b91ef0bde190f66c980a3e</id>
<content type='text'>
Before entering _scratch_init(), register t3 already holds a copy
of the firmware end address, hence there is no need to calculate
it again. This reduces 3 instructions in each _scratch_init() loop.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>firmware: Remove redundant add instruction from trap restore path</title>
<updated>2021-04-05T10:09:28Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2021-04-01T11:01:00Z</published>
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<id>urn:sha1:e71a7c10a934cdfa4c88f0f7b0c8ecb33c9bcff1</id>
<content type='text'>
The "add sp, a0, zero" instruction in the trap restore path is redundant
and can be avoided if TRAP_RESTORE_xyz() assembly macros use a0 as the
base register instead of sp.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>firware: optimize the exception exit code</title>
<updated>2021-04-01T05:18:35Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2021-03-30T12:07:35Z</published>
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<id>urn:sha1:4ef2f5d3e6b25356a8fab19574bed76ce60edeee</id>
<content type='text'>
There are two copies of the same abnormal exit code, this patch deletes one

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
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