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<title>opensbi.git/firmware/fw_base.ldS, branch master</title>
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<updated>2025-07-21T11:09:49Z</updated>
<entry>
<title>firmware: Rename __rel_dyn_start/end to __rela_dyn_start/end</title>
<updated>2025-07-21T11:09:49Z</updated>
<author>
<name>Jessica Clarke</name>
<email>jrtc27@jrtc27.com</email>
</author>
<published>2025-07-10T00:29:35Z</published>
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<id>urn:sha1:e10a45752fe77a1e6fc75e254947dadc3db633ec</id>
<content type='text'>
We are using and expecting the RELA format, not the REL format, and this
is the conventional linker-generated name for the start/end symbols, so
use it rather than confusing things by making it look like we're
accessing .rel.dyn, which would be in the REL format with no explicit
addend.

Signed-off-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Tested-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Link: https://lore.kernel.org/r/20250710002937.44307-1-jrtc27@jrtc27.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>Makefile: enable --gc-sections</title>
<updated>2024-11-06T10:59:39Z</updated>
<author>
<name>Kele Zhang</name>
<email>zhangcola2003@gmail.com</email>
</author>
<published>2024-10-01T23:05:51Z</published>
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<id>urn:sha1:0171cfcc7010bcd75277a2c452e9702d934230f9</id>
<content type='text'>
The --gc-sections option enables the linker to perform garbage
collection of unreferenced code and data, thereby reducing the binary
size.

The -ffunction-sections option will place each function into a separate
section, so it is necessary to add .text.* to the linker script.

Signed-off-by: Kele Zhang &lt;zhangcola2003@gmail.com&gt;
Signed-off-by: Yuan Tan &lt;tanyuan@tinylab.org&gt;
Signed-off-by: Zhangjin Wu &lt;falcon@tinylab.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Bring back FW_TEXT_START as an optional parameter</title>
<updated>2024-05-23T05:20:23Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2024-05-15T04:25:50Z</published>
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<id>urn:sha1:96f0a2e3ea6dc8c337ad1b927d6bda8f5ac151be</id>
<content type='text'>
Bring back FW_TEXT_START as an optional parameter to allow users
explicitly specify compile time address for loading debug symbols.
When not specified, the FW_TEXT_START is assumed to be 0.

Fixes: d4d2582eef7a ("firmware: remove FW_TEXT_START")
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Tested-by: Clément Léger &lt;cleger@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>firmware: remove FW_TEXT_START</title>
<updated>2024-04-10T04:20:24Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2024-04-08T15:27:42Z</published>
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<id>urn:sha1:d4d2582eef7aac442076f955e4024403f8ff3d96</id>
<content type='text'>
Now opensbi can run at any address via dynamic relocation. We can
remove FW_TEXT_START.

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Tested-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: always create dynsym section</title>
<updated>2024-02-05T11:04:44Z</updated>
<author>
<name>Leon M. Busch-George</name>
<email>leon@georgemail.eu</email>
</author>
<published>2024-01-26T15:21:25Z</published>
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<id>urn:sha1:92e8affb31b21ddc5d1193cf754ce644db7b460a</id>
<content type='text'>
With a bare-metal linkers (e.g. riscv64-elf-ld), there exists no
dynsym section. The dynsym section is not used by OpenSBI but
discarding it makes linkers with dynamic library support unhappy.

Signed-off-by: Leon M. Busch-George &lt;leon@georgemail.eu&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Remove handling of R_RISCV_{32,64}</title>
<updated>2023-10-06T03:51:23Z</updated>
<author>
<name>Vivian Wang</name>
<email>dramforever@live.com</email>
</author>
<published>2023-09-17T17:52:50Z</published>
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<id>urn:sha1:2a6d72534d44c39e1de0614970a0dad97b1c41ba</id>
<content type='text'>
Since everything is statically linked, we won't actually have
R_RISCV_{32,64} relocations. No need to handle these.

Fixes: 0f20e8adcf42 ("firmware: Support position independent execution")
Signed-off-by: Vivian Wang &lt;dramforever@live.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Remove ALIGN in .rela.dyn in linker script</title>
<updated>2023-10-06T03:51:21Z</updated>
<author>
<name>Vivian Wang</name>
<email>dramforever@live.com</email>
</author>
<published>2023-09-17T17:52:49Z</published>
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<id>urn:sha1:de525ac18dc32bafc64e78893f343afdd6003028</id>
<content type='text'>
The .rela.dyn section should be exactly the size of the relocations,
without padding. On RV64, .rela* sections are already aligned and
there's no need for padding. On RV32, this adds padding up to 4 bytes,
which, if present, confuses the relocation loop into processing an extra
entry past the end of .rela*, and it crashes with an invalid memory
access.

Fixes: 0f20e8adcf42 ("firmware: Support position independent execution")
Signed-off-by: Vivian Wang &lt;dramforever@live.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Fix fw_rw_offset computation in fw_base.S</title>
<updated>2023-01-27T03:09:49Z</updated>
<author>
<name>Jessica Clarke</name>
<email>jrtc27@jrtc27.com</email>
</author>
<published>2023-01-26T15:40:03Z</published>
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<id>urn:sha1:c8ea836ee33eb778f48f780412e147386dac5301</id>
<content type='text'>
It seems BFD just does totally nonsensical things for SHN_ABS symbols
when producing position-independent outputs (both -pie and -shared)
for various historical reasons, and so SHN_ABS symbols are still
subject to relocation as far as BFD is concerned (except AArch64,
which fixes it in limited cases that don’t apply here...).

The above affects the _fw_rw_offset provided through fw_base.ldS
linker script which results in OpenSBI firmware failing to boot
when loaded at an address different from FW_TEXT_START.

Fixes: c10e3fe5f9a1 ("firmware: Add RW section offset in scratch")
Signed-off-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Reported-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Tested-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>firmware: Move dynsym and reladyn sections to RX section</title>
<updated>2023-01-23T04:36:14Z</updated>
<author>
<name>Himanshu Chauhan</name>
<email>hchauhan@ventanamicro.com</email>
</author>
<published>2023-01-19T15:18:23Z</published>
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<id>urn:sha1:2f40a99c9e0876ac543e918191b2e06ab8a0fdc5</id>
<content type='text'>
Currently, the dynsym and reladyn sections are under RW data.
They are moved to the Read-only/Executable region.

Signed-off-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Split RO/RX and RW sections</title>
<updated>2023-01-23T04:36:14Z</updated>
<author>
<name>Himanshu Chauhan</name>
<email>hchauhan@ventanamicro.com</email>
</author>
<published>2023-01-19T15:18:22Z</published>
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<id>urn:sha1:fefa5488038584a6376a8f361e74ccc2183dd50b</id>
<content type='text'>
Split the RO/RX and RW sections so that they can have
independent pmp entries with required permissions. The
split size is ensured to be a power-of-2 as required by
pmp.

_fw_rw_offset symbol marks the beginning of the data
section.

Signed-off-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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