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<updated>2025-06-16T11:31:52Z</updated>
<entry>
<title>lib: sbi: dbtr: Fix update_triggers to match SBI</title>
<updated>2025-06-16T11:31:52Z</updated>
<author>
<name>Jesse Taube</name>
<email>jesse@rivosinc.com</email>
</author>
<published>2025-05-28T15:46:04Z</published>
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<id>urn:sha1:324021423d063702a5cb2d4207a3a9c4e999549f</id>
<content type='text'>
OpenSBI implements sbi_dbtr_update_trig as
`sbi_dbtr_update_trig(unsigned long trig_idx_base,
                      unsigned long trig_idx_mask)`
yet SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] declares it as
`sbi_debug_update_triggers(unsigned long trig_count)`

Change update_triggers to match SBI.

[0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc

Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support")
Signed-off-by: Jesse Taube &lt;jesse@rivosinc.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Tested-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Reviewed-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250528154604.571815-1-jesse@rivosinc.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: dbtr: Fix shared memory layout</title>
<updated>2025-06-16T04:44:20Z</updated>
<author>
<name>Jesse Taube</name>
<email>jesse@rivosinc.com</email>
</author>
<published>2025-06-04T13:52:25Z</published>
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<content type='text'>
The existing sbi_dbtr_shmem_entry has a size of 5 * XLEN with the final
entry being idx. This is in contrast to the SBI v3.0-rc7 Chapter 19.
Debug Triggers Extension [0] where idx and trig_state share the same
offset (0) in shared memory, with a total size of 4 * XLEN for all the
SBI calls.

Replace struct with union to match memory layout described in SBI.

[0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc

Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support")
Signed-off-by: Jesse Taube &lt;jesse@rivosinc.com&gt;
Reviewed-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Tested-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Tested-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250604135225.842241-1-jesse@rivosinc.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Introduce the SBI debug triggers extension support</title>
<updated>2024-01-10T05:25:42Z</updated>
<author>
<name>Himanshu Chauhan</name>
<email>hchauhan@ventanamicro.com</email>
</author>
<published>2024-01-09T17:00:17Z</published>
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<id>urn:sha1:97f234f15c9657c6ec69fa6ed745be8107bf6ae2</id>
<content type='text'>
RISC-V Debug specification includes Sdtrig ISA extension
which describes Trigger Module. Triggers can cause
a breakpoint exception or trace action without execution
of a special instruction. They can be used to implement
hardware breakpoints and watchpoints for native debugging.

The SBI Debut Trigger extension (Draft v6) can be found at:
https://lists.riscv.org/g/tech-debug/topic/99825362#1302

This patch is an initial implementation of SBI Debug
Trigger Extension (Draft v6) in OpenSBI.

The following features are supported:
 * mcontrol, mcontrol6 triggers
 * Breakpoint and trace actions

NOTE: Chained triggers are not supported

Signed-off-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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