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<title>opensbi.git/include/sbi/sbi_ecall_interface.h, branch v1.5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/include/sbi/sbi_ecall_interface.h?h=v1.5</id>
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<updated>2024-06-19T12:39:22Z</updated>
<entry>
<title>lib: sbi: add support for firmware features extension</title>
<updated>2024-06-19T12:39:22Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-19T09:42:39Z</published>
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<id>urn:sha1:aa5a8593696b39059832d12455c31dcfeb4d9259</id>
<content type='text'>
This extension allows the software running in supervisor mode to control
the behavior of various features of the SBI [1]. Implement the support
for such extension.

Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: sse: fix typos, comments and spacing errors</title>
<updated>2024-05-07T11:54:11Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-04-09T10:02:02Z</published>
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<id>urn:sha1:c21c99db6acf14fdf420271ce670b6a648fc3a9a</id>
<content type='text'>
Fix some errors spotted by Samuel while reviewing the SSE implementation.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reported-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add support for Supervisor Software Events extension</title>
<updated>2024-04-05T10:17:30Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-03-21T15:57:16Z</published>
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<id>urn:sha1:c8cdf01d8f3a87a581c5b03d157dbf12913e9fb5</id>
<content type='text'>
This extension [1] allows to deliver events from SBI to supervisor via
a software mechanism. This extension defines events (either local or
global) which are signaled by the SBI on specific signal sources (IRQ,
exceptions, etc) and are injected to be executed in supervisor mode.

[1] https://lists.riscv.org/g/tech-prs/message/798

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: sbi: Add SBI debug trigger extension related defines</title>
<updated>2024-01-10T05:25:49Z</updated>
<author>
<name>Himanshu Chauhan</name>
<email>hchauhan@ventanamicro.com</email>
</author>
<published>2024-01-09T17:00:18Z</published>
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<id>urn:sha1:fa87ec90a029b2411023c6121ea212137ee45232</id>
<content type='text'>
This patch adds defines for SBI debug trigger extension and
function IDs to access the extension.

Signed-off-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_pmu: Add PMU snapshot definitions</title>
<updated>2023-12-08T17:20:21Z</updated>
<author>
<name>Atish Patra</name>
<email>atishp@rivosinc.com</email>
</author>
<published>2023-12-07T22:23:49Z</published>
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<id>urn:sha1:ee725174bada254f8a081937d870feb837618d6e</id>
<content type='text'>
OpenSBI doesn't support SBI PMU snapshot yet as there is not much benefit
unless the multiple counters overflow at the same time.

Just add the definition and return not supported error at this moment. The
default returned error is also not supported. Thus, no functional change
intended.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi_pmu: Align the event type offset as per SBI specification</title>
<updated>2023-04-07T04:36:59Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-03-30T08:41:14Z</published>
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<id>urn:sha1:edc9914392791031df624a7c79d1706f83199666</id>
<content type='text'>
The bits encoded in event_idx[19:16] indicate the event type, with
an offset of 16 instead of 20.

Fixes: 13d40f21d588 ("lib: sbi: Add PMU support")
Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>include: Add defines for SBI CPPC extension</title>
<updated>2023-04-07T04:05:06Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2023-03-29T08:57:25Z</published>
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<id>urn:sha1:45ba2b203cc38ebfd634dc42c1dd3a2d380a8899</id>
<content type='text'>
Add SBI CPPC extension related defines to the
SBI ecall interface header.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_pmu: Reserve space for implementation specific firmware events</title>
<updated>2023-03-10T08:30:22Z</updated>
<author>
<name>Mayuresh Chitale</name>
<email>mchitale@ventanamicro.com</email>
</author>
<published>2023-03-09T13:13:53Z</published>
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<id>urn:sha1:60c358e6774847629cd608a8841c4e7752b4949a</id>
<content type='text'>
We reserve space for SBI implementation specific custom firmware
events which can be used by M-mode firmwares and HS-mode hypervisors
for their own use. This reserved space is intentionally large to
ensure that SBI implementation has enough space to accommodate
platform specific firmware events as well.

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_pmu: Implement sbi_pmu_counter_fw_read_hi</title>
<updated>2023-03-10T08:30:07Z</updated>
<author>
<name>Mayuresh Chitale</name>
<email>mchitale@ventanamicro.com</email>
</author>
<published>2023-03-09T13:13:52Z</published>
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<id>urn:sha1:51951d9e9af86c885cf5564bba7dd83a9a59a3b3</id>
<content type='text'>
To support 64 bit firmware counters on RV32 systems, we implement
sbi_pmu_counter_fw_read_hi() which returns the upper 32 bits of
the firmware counter value. On RV64 (or higher) systems, this
function will always return zero.

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add system suspend skeleton</title>
<updated>2023-02-27T14:13:52Z</updated>
<author>
<name>Andrew Jones</name>
<email>ajones@ventanamicro.com</email>
</author>
<published>2023-02-27T10:31:02Z</published>
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<id>urn:sha1:73623a0acac7f62646757cdd5a03b325eba3e0c9</id>
<content type='text'>
Add the SUSP extension probe and ecall support, but for now the
system suspend function is just a stub.

Signed-off-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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