opensbi.git/include/sbi/sbi_hart.h, branch master

lib: sbi: domain FP/Vector context support for context switch

2026-05-18T08:32:28Z

This patch adds proper support for per-domain floating-point (FP) and vector (V) contexts in the domain context switch logic. Each domain now maintains its own FP and vector state, which is saved and restored during domain switches. Conditionalize FP and Vector save/restore based on extensions, unconditional save and restore of floating-point (FP) and Vector registers fails on generic platform firmware. This firmware must run on multiple platforms that may lack these extensions. Address this by conditionally executing FP save/restore only if the underlying hart supports the F or D extensions. Similarly, perform Vector save/restore only if the hart supports the Vector extension. This improves support for multi-domain systems with FP and Vector extensions, and prevents corruption of FP/Vector state during domain switches. Signed-off-by: Dave Patel Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260518083023.997323-4-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: sbi: Add Smrnmi extension macros for registers and bits

2026-05-09T07:29:43Z

Add CSR definitions (MNSCRATCH, MNSTATUS, MNEPC, MNCAUSE) and bit definitions (MNSTATUS_NMIE, MNSTATUS_MNPV, MNSTATUS_MNPP). Also add SBI_HART_EXT_SMRNMI to the hart extension enumeration. Signed-off-by: Evgeny Voevodin Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/1c6feb6d359b9827b3c2ad8f4f0e0a4dfd1de911.1778176768.git.evvoevod@tenstorrent.com Signed-off-by: Anup Patel

lib: sbi: Factor-out PMP programming into separate sources

2025-12-16T14:46:47Z

The PMP programming is a significant part of sbi_hart.c so factor-out this into separate sources sbi_hart_pmp.c and sbi_hart_pmp.h for better maintainability. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20251209135235.423391-6-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: Replace sbi_hart_pmp_xyz() and sbi_hart_map/unmap_addr()

2025-12-16T14:46:47Z

The sbi_hart_pmp_xyz() and sbi_hart_map/unmap_addr() functions can now be replaced by various sbi_hart_protection_xyz() functions. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20251209135235.423391-5-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: Introduce sbi_hart_pmp_unconfigure() function

2025-12-16T14:46:47Z

Currently, the unconfiguring PMP is implemented directly inside switch_to_next_domain_context() whereas rest of the PMP programming is done via functions implemented in sbi_hart.c. Introduce a separate sbi_hart_pmp_unconfigure() function so that all PMP programming is in one place. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20251209135235.423391-2-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: Enable Ssqosid Ext using mstateen0

2025-12-08T05:34:06Z

The QoS Identifiers extension (Ssqosid) introduces the srmcfg register, which configures a hart with two identifiers: a Resource Control ID (RCID) and a Monitoring Counter ID (MCID). These identifiers accompany each request issued by the hart to shared resource controllers. If extension Smstateen is implemented together with Ssqosid, then Ssqosid also requires the SRMCFG bit in mstateen0 to be implemented. If mstateen0.SRMCFG is 0, attempts to access srmcfg in privilege modes less privileged than M-mode raise an illegal-instruction exception. If mstateen0.SRMCFG is 1 or if extension Smstateen is not implemented, attempts to access srmcfg when V=1 raise a virtual-instruction exception. This extension can be found in the RISC-V Instruction Set Manual: https://github.com/riscv/riscv-isa-manual Changes in v5: - Remove SBI_HART_EXT_SSQOSID dependency SBI_HART_PRIV_VER_1_12 Changes in v4: - Remove extraneous parentheses around SMSTATEEN0_SRMCFG Changes in v3: - Check SBI_HART_EXT_SSQOSID when swapping SRMCFG Changes in v2: - Remove trap-n-detect - Context switch CSR_SRMCFG Signed-off-by: Chen Pei Reviewed-by: Radim Krčmář Link: https://lore.kernel.org/r/20251114115722.1831-1-cp0613@linux.alibaba.com Signed-off-by: Anup Patel

lib: sbi: sbi_hart: track firmware PMP entries for SmePMP

2025-11-02T11:19:47Z

Add fw_smepmp_ids bitmap to track PMP entries that protect firmware regions. Allow us to preserve these critical entries across domain transitions and check inconsistent firmware entry allocation. Also add sbi_hart_smepmp_is_fw_region() helper function to query whether a given SmePMP entry protects firmware regions. Signed-off-by: Yu-Chien Peter Lin Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20251008084444.3525615-8-peter.lin@sifive.com Signed-off-by: Anup Patel

lib: sbi: Add SiFive proprietary xsfcease

2025-10-28T05:57:57Z

Using ISA string "xsfcease" to detect the support of the custom instruction "CEASE". Reviewed-by: Cyan Yang Reviewed-by: Anup Patel Signed-off-by: Nick Hu Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-6-69a132447d8a@sifive.com Signed-off-by: Anup Patel

lib: sbi: Add SiFive proprietary xsfcflushdlone

2025-10-28T05:57:55Z

Using ISA string "xsfcflushdlone" to detect the support of the SiFive L1D cache flush custom instruction. Reviewed-by: Cyan Yang Reviewed-by: Anup Patel Signed-off-by: Nick Hu Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-5-69a132447d8a@sifive.com Signed-off-by: Anup Patel

lib: sbi: Remove redundant call to sbi_hart_expected_trap_addr()

2025-07-20T15:24:34Z

The variable "sbi_hart_expected_trap" has already been extern variable. Therefore, the program can directly refer to it instead of calling sbi_hart_expected_trap_addr(). Signed-off-by: Alvin Chang Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250703151957.2545958-2-alvinga@andestech.com Signed-off-by: Anup Patel