opensbi.git/include/sbi/sbi_platform.h, branch v1.8

lib: sbi: give platform choice of using single memregion to cover OpenSBI

2025-12-21T15:03:23Z

By default the OpenSBI itself is covered by 2 memregions for RX/RW sections. This is required by platforms with Smepmp to enforce proper permissions in M mode. Note: M-mode only regions can't have RWX permissions with Smepmp. Platforms with traditional PMPs won't be able to benefit from it, as both regions are effectively RWX in M mode, but usually it's harmless to so. Now we provide these platforms with an option to disable this logic. It saves 1 PMP entry. For platforms really in short of PMPs, it does make a difference. Note: Platform requesting single OpenSBI memregion must be using traditional (old) PMP. We expect the platform code to do the right thing. Signed-off-by: Bo Gan Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20251218104243.562667-5-ganboing@gmail.com Signed-off-by: Anup Patel

include: sbi: Remove platform specific IPI init

2025-09-16T04:26:31Z

The platform specfic IPI init is not need anymore because using IPI device rating multiple IPI devices can be registered in any order as part of the platform specific early init. Signed-off-by: Anup Patel Reviewed-by: Samuel Holland Tested-by: Nick Hu Link: https://lore.kernel.org/r/20250904052410.546818-3-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi_platform: Add platform specific pmp_set() and pmp_disable()

2025-06-17T04:04:01Z

Allow platforms to implement platform specific PMP setup and PMP disable functions which are called before actual PMP CSRs are configured. Also, implement pmp_set() and pmp_disable() for MIPS P8700. Signed-off-by: Chao-ying Fu Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250614172756.153902-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: Set the scratch allocation to alignment to cacheline size

2025-04-24T03:53:47Z

Set the scratch allocation alignment to cacheline size specified by riscv,cbom-block-size in the DTS file to avoid two atomic variables from the same cache line causing livelock on some platforms. If the cacheline is not specified, we set it a default value. Signed-off-by: Raj Vishwanathan Reviewed-by: Anup Patel Reviewed-by: Samuel Holland Link: https://lore.kernel.org/r/20250423225045.267983-1-Raj.Vishwanathan@gmail.com Signed-off-by: Anup Patel

lib: sbi_platform: Remove the vendor_ext_check hook

2025-04-23T07:02:51Z

Now that the generic platform only sets .vendor_ext_provider if the function is really implemented, there is no need for a separate hook to check if a vendor extension is implemented. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250325234342.711447-11-samuel.holland@sifive.com Signed-off-by: Anup Patel

lib: sbi: Simplify structure member offset checking

2025-04-15T05:56:36Z

Add a macro assert_member_offset() to perform structure member offset checking. Signed-off-by: Xiang W Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250319123919.505443-1-wxjstz@126.com Signed-off-by: Anup Patel

lib: sbi: Use sbi_hart_count() and sbi_for_each_hartindex()

2025-03-24T12:27:20Z

Simplify the code and improve consistency by using the new macros where possible. sbi_hart_count() obsoletes sbi_scratch_last_hartindex(). Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi_scratch: Apply bounds check to platform hart_count

2025-03-24T12:26:04Z

The internal limit on the number of harts is SBI_HARTMASK_MAX_BITS, as this value determines the size of various bitmaps and arrays (including hartindex_to_hartid_table and hartindex_to_scratch_table). Clamp the value provided by the platform, and drop the extra array element. Update the documentation to indicate that hart_index2id must be sized based on hart_count, and that hart indexes must be contiguous. As of commit 5e90e54a1a53 ("lib: utils:Check that hartid is valid"), there is no restriction on the valid hart ID values. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi: Add SBI Message Proxy (MPXY) framework

2024-12-06T03:56:50Z

Introduce SBI Message Proxy (MPXY) framework which allows platform specific code or drivers to register message protocol specific channels. This framework enables the supervisor software to send messages belonging to different message protocols via OpenSBI firmware. Signed-off-by: Rahul Pathak Co-developed-by: Himanshu Chauhan Signed-off-by: Himanshu Chauhan Co-developed-by: Anup Patel Signed-off-by: Anup Patel

platform: Drop irqchip warm init and exit hooks

2024-11-28T06:16:36Z

Now that driver lifecycle is managed from within the SBI irqchip core, platforms need only to initialize the driver once during cold init. Remove the remaining platform hooks that are no longer used. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel