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<title>opensbi.git/include/sbi/sbi_trap.h, branch v1.9</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/include/sbi/sbi_trap.h?h=v1.9</id>
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<updated>2026-06-16T07:00:22Z</updated>
<entry>
<title>include: sbi: Add GET_RDS_NUM/SET(_FP32/_FP64)_RDS macros</title>
<updated>2026-06-16T07:00:22Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2026-06-05T11:32:09Z</published>
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<id>urn:sha1:1b3424d5c0901dcea24ca3427009b299662949a0</id>
<content type='text'>
These macros can be used to decode rd' and set rd' in RVC instructions

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Tested-by: Anirudh Srinivasan &lt;asrinivasan@oss.tenstorrent.com&gt;
Link: https://lore.kernel.org/r/20260605113214.242-4-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: sbi: Add sbi_regs_prev_xlen</title>
<updated>2026-06-16T06:59:59Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2026-06-05T11:32:08Z</published>
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<id>urn:sha1:bd986ed03d6336ddbd5ee90aca8a3ca533b1d5a4</id>
<content type='text'>
sbi_regs_prev_xlen reports the xlen of previous mode by decoding
from multiple CSRs including mstatus/hstatus/vsstatus

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Tested-by: Anirudh Srinivasan &lt;asrinivasan@oss.tenstorrent.com&gt;
Link: https://lore.kernel.org/r/20260605113214.242-3-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>firmware: Add RNMI handler infrastructure</title>
<updated>2026-05-09T07:29:43Z</updated>
<author>
<name>Evgeny Voevodin</name>
<email>evvoevod@tenstorrent.com</email>
</author>
<published>2026-05-07T18:08:04Z</published>
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<id>urn:sha1:00fec20b4976c756ddacedef23a6bf510fa00dad</id>
<content type='text'>
Implement basic Resumable NMI (RNMI) handler support for the RISC-V
Smrnmi extension.

The new _trap_rnmi_handler assembly entry point saves context using the
Smrnmi MN* CSRs (MNSCRATCH, MNEPC, MNSTATUS, MNCAUSE) and returns via
mnret. It dispatches to sbi_trap_rnmi_handler(), which optionally calls
a platform-specific ops-&gt;rnmi_handler callback for actual NMI
processing. If no platform handler is registered or it fails, the
event is reported as an unhandled NMI.

The RNMI handler reuses the generic trap context structure but stores MN*
CSR values (MNEPC, MNSTATUS, MNCAUSE) into the corresponding generic
fields (mepc, mstatus, cause) for compatibility with existing trap
infrastructure.

Signed-off-by: Evgeny Voevodin &lt;evvoevod@tenstorrent.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/050ae6d2762ba8d5b9dfb3cc1960a23aa3d6c549.1778176768.git.evvoevod@tenstorrent.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: sbi: Use array for struct sbi_trap_regs and GET/SET macros</title>
<updated>2025-07-22T10:24:27Z</updated>
<author>
<name>Jessica Clarke</name>
<email>jrtc27@jrtc27.com</email>
</author>
<published>2025-07-09T23:29:28Z</published>
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<id>urn:sha1:ffd3ed976d88fa5cda56d9d2c139557c69eec5d8</id>
<content type='text'>
Rather than hand-rolling scaled pointer arithmetic with casts and
shifts, let the compiler do so by indexing an array of GPRs, taking
advantage of the language's type system to scale based on whatever type
the register happens to be. This makes it easier to support CHERI where
the registers are capabilities, not plain integers, and so this pointer
arithmetic would need to change (and currently REGBYTES is both the size
of a register and the size of an integer word upstream).

Signed-off-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250709232932.37622-1-jrtc27@jrtc27.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: sbi: Align SBI trap registers to a nice boundary</title>
<updated>2025-02-12T03:44:43Z</updated>
<author>
<name>Raj Vishwanathan</name>
<email>raj.vishwanathan@gmail.com</email>
</author>
<published>2025-02-11T21:46:39Z</published>
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<id>urn:sha1:4f12f8b02f669e7cd3286a543f2cb6308fe5a0fe</id>
<content type='text'>
Align SBI_TRAP_CONTEXT_SIZE to a multiple of 16 bytes. If it is not
aligned to 16 bytes for RV64, it can create performance problems.
Aligning it correctly can fix the performance issues.

Signed-off-by: Raj Vishwanathan &lt;Raj.Vishwanathan@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: factorize previous mode computation</title>
<updated>2024-10-25T18:23:18Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-10-18T08:40:03Z</published>
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<id>urn:sha1:80656bdb1daf380b5562cba11f43754fe916d631</id>
<content type='text'>
Previous privilege mode retrieval from mstatus is done at different
places, factorize it rather than copy/pasting it again.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: factorize previous virtualization mode read from regs</title>
<updated>2024-10-25T18:22:51Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-10-18T08:40:02Z</published>
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<id>urn:sha1:daa282573ffac0f295de7631c98840668f20a568</id>
<content type='text'>
The same pattern is used at multiple places to verify in which mode
the exception was actually taken. Factorize it.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Introduce trap context</title>
<updated>2024-03-19T06:01:22Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2024-03-11T09:10:12Z</published>
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<id>urn:sha1:abea949721bc635cfe39e34adc501d7be87db8ae</id>
<content type='text'>
Club the struct sbi_trap_regs and struct sbi_trap_info a new
struct sbi_trap_context (aka trap context) which must be saved
by low-level trap handler before calling sbi_trap_handler().

To track nested traps, the struct sbi_scratch points to the current
trap context and the trap context has pointer to pervious context
of previous trap.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Tested-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Remove sbi_trap_exit() and related code</title>
<updated>2024-03-19T06:01:18Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2024-03-11T05:34:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=ebb697ad8cdd5c281a94e7801fc0c1d99d6a891e'/>
<id>urn:sha1:ebb697ad8cdd5c281a94e7801fc0c1d99d6a891e</id>
<content type='text'>
Over the years, no uses of sbi_trap_exit() have been found so remove
it and also remove related code from fw_base.S and sbi_scratch.h.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Tested-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Remove epc from struct sbi_trap_info</title>
<updated>2024-03-19T06:01:16Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-03-11T17:47:50Z</published>
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<id>urn:sha1:2e8517865ab7f25a9ed92a2c1b4f938368fe45f9</id>
<content type='text'>
In the only places this value is used, it duplicates mepc from
struct sbi_trap_regs.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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