opensbi.git/include/sbi, branch v1.1

include: Bump-up version to 1.1

2022-06-25T03:42:10Z

This patch updates OpenSBI version to 1.1 as part of release preparation. Signed-off-by: Anup Patel

include: sbi: Change spec version to 1.0

2022-06-24T03:24:59Z

Now that SBI v1.0 specification is ratified, we change spec verion implemented by OpenSBI to v1.0. Signed-off-by: Anup Patel Reviewed-by: Atish Patra

lib: utils: Remove CSRs that set/clear an IMSIC interrupt file bits

2022-06-21T03:14:45Z

Based on architecture review committee feedback, the [m|s|vs]seteienum, [m|s|vs]clreienum, [m|s|vs]seteipnum, and [m|s|vs]clreipnum CSRs are removed in the latest AIA draft v0.3.0 specification. (Refer, https://github.com/riscv/riscv-aia/releases/tag/0.3.0-draft.31) These CSRs were mostly for software convenience and software can always use [m|s|vs]iselect and [m|s|vs]ireg CSRs to update the IMSIC interrupt file bits. We update the IMSIC programming as-per above to match the latest AIA draft specification. Signed-off-by: Anup Patel Reviewed-by: Atish Patra

include: sbi: Add mtinst/htinst psuedoinstructions

2022-06-21T03:01:04Z

Add psuedoinstruction encodings written to mtinst/htinst for faults caused by implicit memory access for VS-stage address translation Signed-off-by: dramforever Reviewed-by: Anup Patel

lib: sbi_hsm: Assume a consistent resume address

2022-06-13T06:24:06Z

The suspend code needs to know the resume address for two reasons: 1) Programming some hardware register or management firmware. Here we assume the hardware/firmware maintains its state between suspends, so it only needs to be programmed once at startup. 2) When a non-retentive suspend request ends up being retentive, due to lack of hardware support, pending interrupt, or for some other reason. However, the behavior here is not platform-dependent, and this can be handled in the generic hart suspend function. Since neither situation requires the platform-level suspend function to know the resume address, stop passing it to that function. Instead, handle the non-retentive to retentive situation generically. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: sbi_hsm: Call a device hook during hart resume

2022-06-13T06:24:06Z

Non-retentive suspend states may require platform-specific actions during resume. For example, firmware may need to save and restore the values of custom CSRs. Add a hook to support this. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: sbi_illegal_insn: Add emulation for fence.tso

2022-06-01T11:50:20Z

While OpenC906 appears to properly decode `fence.tso` as a fence instruction[1], the version of the C906 taped out in the Allwinner D1 does not, and raises illegal instruction. Handle this errata by emulating `fence.tso` as `fence rw, rw`. [1]: https://github.com/T-head-Semi/openc906/blob/30827e7f/C906_RTL_FACTORY/gen_rtl/idu/rtl/aq_idu_id_decd.v#L2097 Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi_platform: Add callback to populate HART extensions

2022-05-07T04:47:28Z

We add platform specific extensions_init() callback which allows platforms to populate HART extensions for each HART. For example, the generic platform can populate HART extensions from HART ISA string described in DeviceTree. Signed-off-by: Anup Patel Reviewed-by: Atish Patra

lib: sbi: Add sbi_hart_update_extension() function

2022-05-07T04:47:25Z

We add sbi_hart_update_extension() function which allow platforms to enable/disable hart extensions. Signed-off-by: Anup Patel Reviewed-by: Atish Patra

lib: sbi: Convert hart features into hart extensions

2022-05-07T04:46:30Z

Since past few years, we have been using "hart features" in OpenSBI to represent all optionalities and multi-letter extensions defined by the RISC-V specifications. The RISC-V profiles specification has taken a different approach and started assigning extension names for all optionalities which did not have any extension name previously. (Refer, https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc) Inspired from the RISC-V profiles specification, we convert OpenSBI hart features into hart extensions. Going forward, we align the extension naming with RISC-V profiles specification. Currently, only "time CSR" and "AIA CSR" have not been assigned extension name but for everything else we have a name. Signed-off-by: Anup Patel Reviewed-by: Atish Patra