<feed xmlns='http://www.w3.org/2005/Atom'>
<title>opensbi.git/include/sbi, branch v1.4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/include/sbi?h=v1.4</id>
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<updated>2023-12-27T07:02:58Z</updated>
<entry>
<title>include: Bump-up version to 1.4</title>
<updated>2023-12-27T07:02:58Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-12-27T07:02:58Z</published>
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<id>urn:sha1:a2b255b88918715173942f2c5e1f97ac9e90c877</id>
<content type='text'>
This patch updates OpenSBI version to 1.4 as part of
release preparation.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Remove the SBI_ETRAP error code</title>
<updated>2023-12-19T10:26:37Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-12-11T15:41:03Z</published>
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<id>urn:sha1:5a57e8cd41f3c8754a5f0e511a63072724c1f0b7</id>
<content type='text'>
The SBI_ETRAP error code was introduced only for doing trap
redirection in generic sbi_ecall_handler(). Now the trap
redirection is moved into sbi_ecall_legacy.c and SBI_ETRAP
error code is only used in this source file so let us remove
it.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Allow ecall handlers to directly update register state</title>
<updated>2023-12-19T10:26:37Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-12-11T15:29:14Z</published>
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<id>urn:sha1:3284bea83368de2ced244d5b2b0eaeaae812a08d</id>
<content type='text'>
Some of the upcoming SBI extensions (such as SSE) will directly
update register state so improve the prototype of ecall handler
to accommodate this. Further, this flexibility allows us to
push the trap redirection from sbi_ecall_handler() to the
sbi_ecall_legacy_handler().

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi_tlb: Reduce size of struct sbi_tlb_info</title>
<updated>2023-12-19T10:26:37Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-12-11T07:56:49Z</published>
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<id>urn:sha1:416ceb3cd72db8d24373274316e2f5d5d3800bf3</id>
<content type='text'>
Let us reduce the size of struct sbi_tlb_info by doing the
following:
1) Change the data type of asid and vmid fields to uint16_t
2) Replace local_fn() function pointer with an enum

Based on the above, the size of struct sbi_tlb_info is reduced
by 16 bytes on RV64 and 4 bytes on RV32.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Detect extensions from the ISA string in DT</title>
<updated>2023-12-19T10:09:17Z</updated>
<author>
<name>Yong-Xuan Wang</name>
<email>yongxuan.wang@sifive.com</email>
</author>
<published>2023-12-12T08:58:35Z</published>
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<id>urn:sha1:3daac8fb87a4d04fe8dfc0ff4a6ffb947107e1a9</id>
<content type='text'>
Enable access to some extensions through menvcfg and show them in "Boot
HART ISA Extensions" if they are present in the device tree.

Signed-off-by: Yong-Xuan Wang &lt;yongxuan.wang@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Using one array to define the name of extensions</title>
<updated>2023-12-19T08:44:22Z</updated>
<author>
<name>Yong-Xuan Wang</name>
<email>yongxuan.wang@sifive.com</email>
</author>
<published>2023-12-12T08:58:34Z</published>
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<id>urn:sha1:776770d2adbf3ae7d9d3b97f0756c7589003835f</id>
<content type='text'>
Define an array sbi_hart_ext to map extension ID and name , and use it
for ISA parsing and printing out the supported extensions.

Signed-off-by: Yong-Xuan Wang &lt;yongxuan.wang@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Refactor the code for enable extensions in menvfg CSR</title>
<updated>2023-12-19T08:24:33Z</updated>
<author>
<name>Yong-Xuan Wang</name>
<email>yongxuan.wang@sifive.com</email>
</author>
<published>2023-12-12T08:58:33Z</published>
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<id>urn:sha1:056fe6f85dc6b68783f56cb6ea7394e857ab8cc3</id>
<content type='text'>
Use 1 variable to store the value of menvcfg.

Signed-off-by: Yong-Xuan Wang &lt;yongxuan.wang@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: recalculate heap size to support new tlb entry number</title>
<updated>2023-12-11T03:53:24Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2023-12-10T09:44:54Z</published>
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<id>urn:sha1:87aa3069d14b52bf87cb14d8f6b3ed51b45465ea</id>
<content type='text'>
Previous patch introduced a change that using hart count as the default
number of tlb entries in the fifo. This makes the default tlb fifo size
grow in square with the number of harts. So the default heap size is
not enough to allocate tlb fifo when the hart count is big.

Fixes: 52fd64b ("platform: Uses hart count as the default size of tlb info")
Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_pmu: Fix the counter info function</title>
<updated>2023-12-08T17:20:23Z</updated>
<author>
<name>Atish Patra</name>
<email>atishp@rivosinc.com</email>
</author>
<published>2023-12-07T22:23:50Z</published>
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<id>urn:sha1:11a0ba5d4bce74b2573091c5533717c2871191f1</id>
<content type='text'>
The counter info should only return valid hardware counters for the ones
set in the counter mask. Otherwise, it will report incorrect number of
hardware counters to the supervisor if the platform has discontiguous
counters.

Fixes: c744ed77b18c ("lib: sbi_pmu: Enable noncontigous hpm event and counters")
Signed-off-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_pmu: Add PMU snapshot definitions</title>
<updated>2023-12-08T17:20:21Z</updated>
<author>
<name>Atish Patra</name>
<email>atishp@rivosinc.com</email>
</author>
<published>2023-12-07T22:23:49Z</published>
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<id>urn:sha1:ee725174bada254f8a081937d870feb837618d6e</id>
<content type='text'>
OpenSBI doesn't support SBI PMU snapshot yet as there is not much benefit
unless the multiple counters overflow at the same time.

Just add the definition and return not supported error at this moment. The
default returned error is also not supported. Thus, no functional change
intended.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
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