opensbi.git/include/sbi, branch v1.7

include: Bump-up version to 1.7

2025-06-30T03:07:30Z

Update the OpenSBI version to 1.7 as part of release preparation. Signed-off-by: Anup Patel Signed-off-by: Anup Patel

lib: sbi_platform: Add platform specific pmp_set() and pmp_disable()

2025-06-17T04:04:01Z

Allow platforms to implement platform specific PMP setup and PMP disable functions which are called before actual PMP CSRs are configured. Also, implement pmp_set() and pmp_disable() for MIPS P8700. Signed-off-by: Chao-ying Fu Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250614172756.153902-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: dbtr: Fix update_triggers to match SBI

2025-06-16T11:31:52Z

OpenSBI implements sbi_dbtr_update_trig as `sbi_dbtr_update_trig(unsigned long trig_idx_base, unsigned long trig_idx_mask)` yet SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] declares it as `sbi_debug_update_triggers(unsigned long trig_count)` Change update_triggers to match SBI. [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support") Signed-off-by: Jesse Taube Reviewed-by: Himanshu Chauhan Tested-by: Charlie Jenkins Reviewed-by: Charlie Jenkins Link: https://lore.kernel.org/r/20250528154604.571815-1-jesse@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: dbtr: Fix shared memory layout

2025-06-16T04:44:20Z

The existing sbi_dbtr_shmem_entry has a size of 5 * XLEN with the final entry being idx. This is in contrast to the SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] where idx and trig_state share the same offset (0) in shared memory, with a total size of 4 * XLEN for all the SBI calls. Replace struct with union to match memory layout described in SBI. [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support") Signed-off-by: Jesse Taube Reviewed-by: Charlie Jenkins Tested-by: Charlie Jenkins Reviewed-by: Himanshu Chauhan Tested-by: Himanshu Chauhan Link: https://lore.kernel.org/r/20250604135225.842241-1-jesse@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: Revert entry_count before doing hsm stop in hsm wait loop

2025-06-16T04:10:28Z

Using hsm stop in hsm wait loop causes secondary harts to be stuck forever in OpenSBI on RISC-V platforms where HSM hart hotplug is available and all harts come-up at the same time during system power-on. For example, lets say we have two harts A and B on a RISC-V platform with HSM hart hotplug which come-up at the same time during system power-on. The hart A enters OpenSBI before hart B hence it becomes the primary (or cold-boot) hart whereas hart B becomes the secondary (or warm-boot) hart. The hart A follows the OpenSBI cold-boot path and registers hsm device before hart B enters OpenSBI. The hart B eventually enters OpenSBI and follows the OpenSBI warm-boot path so it will increment it's own entry_count before entering hsm wait loop where it sees hsm device and stops itself. Later as part of the Linux boot-up sequence, hart A issues SBI HSM start call to bring-up hart B but OpenSBI sees entry_count != init_count for hart B in sbi_hsm_hart_start() hence hsm_device_hart_start() is not called for hart B resulting in hart B stuck forever in OpenSBI. To fix the above issue, revert entry_count before doing hsm stop in hsm wait loop. Fixes: d844deadec94 ("lib: sbi: Use hsm stop for hsm wait") Signed-off-by: Anup Patel Reviewed-by: Nick Hu Link: https://lore.kernel.org/r/20250527124821.2113467-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

include: sbi: Change SBI spec version to 3.0

2025-05-20T08:17:34Z

Now that SBI v3.0 specification is frozen, change runtime SBI version implemented by OpenSBI to v3.0. Also, mark extensions defined by the SBI v3.0 specification as non-experimental. Signed-off-by: Anup Patel Reviewed-by: Clément Léger Reviewed-by: Atish Patra Link: https://lore.kernel.org/r/20250516122844.113423-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: hart: Detect existence of cycle and instret CSRs for Zicntr

2025-05-20T07:55:53Z

Zicntr extension specifies three read-only CSRs, time, cycle and instret. It isn't sufficient to report Zicntr is fully supported with only time CSR detected. This patch introduces a bitmap to sbi_hart_features to record availability of these CSRs, which are detected using traps. Zicntr is reported as present if and only if three CSRs are all available on the HARTs. Sites originally depending on SBI_HART_EXT_ZICNTR for detecting existence of time CSR are switched to detect SBI_HART_CSR_TIME instead. Suggested-by: Anup Patel Signed-off-by: Yao Zi Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250516133352.36617-3-ziyao@disroot.org Signed-off-by: Anup Patel

lib: Emulate AMO instructions when Zaamo is not available

2025-05-20T03:48:03Z

The AMO instructions are very critical for Linux so allow low-end RISC-V implementations without Zaamo to boot Linux by emulating AMO instructions using Zalrsc when OpenSBI is compiled without Zaamo. Signed-off-by: Chao-ying Fu Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250519121207.976949-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi_hart: add Ssstateen extension

2025-04-30T04:44:26Z

We already detect Smstateen, but Ssstateen exists as well and it doesn't have the M-state CSRs. Reviewed-by: Anup Patel Signed-off-by: Radim Krčmář Link: https://lore.kernel.org/r/20250429142549.3673976-9-rkrcmar@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: add 64 bit csr macros

2025-04-30T04:44:25Z

Most CSRs are XLEN bits wide, but some are 64 bit, so rv32 needs two accesses, plaguing the code with ifdefs. Add new helpers that split 64 bit operation into two operations on rv32. The helpers don't use "csr + 0x10", but append "H" at the end of the csr name to get a compile-time error when accessing a non 64 bit register. This has the downside that you have to use the name when accessing them. e.g. csr_read64(0x1234) or csr_read64(CSR_SATP) won't compile and the error messages you get for these bugs are not straightforward. Reviewed-by: Anup Patel Signed-off-by: Radim Krčmář Link: https://lore.kernel.org/r/20250429142549.3673976-3-rkrcmar@ventanamicro.com Signed-off-by: Anup Patel