opensbi.git/include/sbi_utils/fdt, branch v1.4

lib: utils/timer: mtimer: only use regname for aclint

2023-12-27T06:27:33Z

The parser will fail if the timer is clint timer and has regname property. As the regname is only meaningful for aclint, it is more robust to only check regname for aclint timer. Fixes: 6112d58 ("lib: utils/fdt: Allow to use reg-names when parsing ACLINT") Signed-off-by: Inochi Amaoto Reviewed-by: Anup Patel

lib: utils/fdt: Allow to use reg-names when parsing ACLINT

2023-12-11T05:05:32Z

Currently, the fdt_parse_aclint_node() follows a fixed order to parse ACLINT timer. This may cause the undesirable result when the ACLINT device does not support mtime without adding an empty entry for it in the DT. To be robust, make fdt_parse_aclint_node() support "reg-names" property, so it can parse the DT in an order independent way. For compatibility, fdt_parse_aclint_node() only use "reg-names" when parsing ACLINT timer, and will fallback to the old way if "reg-names" property is not found. Link: https://lore.kernel.org/all/20231114-skedaddle-precinct-66c8897227bb@squawk/ Signed-off-by: Inochi Amaoto Reviewed-by: Anup patel

lib: utils: fdt_pmu: Make the fdt_pmu_evt_select table global variable

2023-12-06T12:45:41Z

To allow platform override pmu_init() filling the translation table fdt_pmu_evt_select[] when PMU node doesn't provide such information, we need to share the table and its entry counter with other .c file. We also define the structures of PMU property in fdt_helper.h, so we can initialize the mappings in arrays. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Atish Patra Reviewed-by: Anup Patel

lib: utils: Add detection of Smepmp from ISA string in FDT

2023-07-13T06:42:58Z

- Add function to parse ISA string in FDT. - Set Smepmp feature bit in extensions if "smepmp" string is found in ISA string. Signed-off-by: Himanshu Chauhan Reviewed-by: Anup Patel

platform/lib: Set no-map attribute on all PMP regions

2023-06-15T12:57:17Z

This reverts commit 6966ad0abe70 ("platform/lib: Allow the OS to map the regions that are protected by PMP"). It was thought at the time of this commit that allowing the kernel to map PMP protected regions was safe but it is actually not: for example, the hibernation process will try to access any linear mapping page and then will fault on such mapped PMP regions [1]. Another issue is that the device tree specification [2] states that a !no-map region must be declared as EfiBootServicesData/Code in the EFI memory map which would make the PMP protected regions reclaimable by the kernel. And to circumvent this, RISC-V edk2 diverges from the DT specification to declare those regions as EfiReserved. The no-map attribute was removed to allow the kernel to use hugepages larger than 2MB to map the linear mapping to improve the performance but actually a recent talk from Mike Rapoport [3] stated that the performance benefit was marginal. For all those reasons, let's mark all the PMP protected regions as "no-map". [1] https://lore.kernel.org/linux-riscv/CAAYs2=gQvkhTeioMmqRDVGjdtNF_vhB+vm_1dHJxPNi75YDQ_Q@mail.gmail.com/ [2] "3.5.4 /reserved-memory and UEFI" https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4-rc1/devicetree-specification-v0.4-rc1.pdf [3] https://lwn.net/Articles/931406/ Signed-off-by: Alexandre Ghiti Reviewed-by: Atish Patra Reviewed-by: Xiang W

include: fdt/fdt_helper: Change fdt_get_address() to return root.next_arg1

2023-02-27T04:34:03Z

In sbi_domain_finalize(), when locating the coldboot hart's domain, the coldboot hart's scratch->arg1 will be overwritten by the domain configuration. However scratch->arg1 holds the FDT address of the coldboot hart, and is still being accessed by fdt_get_address() in later boot process. scratch->arg1 could then contain completely garbage and lead to a crash. To fix this, we change fdt_get_address() to return root domain's next_arg1 as the FDT pointer. Resolves: https://github.com/riscv-software-src/opensbi/issues/281 Fixes: b1678af210dc ("lib: sbi: Add initial domain support") Reported-by: Marouene Boubakri Signed-off-by: Bin Meng Reviewed-by: Anup Patel

lib: utils: Add fdt_add_cpu_idle_states() helper function

2023-01-24T12:00:21Z

Since the availability and latency properties of CPU idle states depend on the specific SBI HSM implementation, it is appropriate that the idle states are added to the devicetree at runtime by that implementation. This helper function adds a platform-provided array of idle states to the devicetree, following the SBI idle state binding. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: utils: serial: Add FDT driver for Renesas SCIF

2022-12-12T13:20:35Z

Add FDT driver for Renesas SCIF. dts example: soc: soc { .... scif0: serial@1004b800 { compatible = "renesas,scif-r9a07g043", "renesas,scif-r9a07g044"; reg = <0 0x1004b800 0 0x400>; interrupts = <412 IRQ_TYPE_LEVEL_HIGH>, <414 IRQ_TYPE_LEVEL_HIGH>, <415 IRQ_TYPE_LEVEL_HIGH>, <413 IRQ_TYPE_LEVEL_HIGH>, <416 IRQ_TYPE_LEVEL_HIGH>, <416 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>; clock-names = "fck"; power-domains = <&cpg>; resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>; status = "disabled"; }; .... }; Signed-off-by: Lad Prabhakar Reviewed-by: Anup Patel

lib: utils/ipi: Add Andes fdt ipi driver support

2022-10-23T05:01:01Z

Move Andes PLICSW ipi device to fdt ipi framework, this patch is based on Leo's modified IPI scheme on PLICSW. Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according to spec. After some investigation, self-IPI seems to be seldom or never used, so we re-order the IPI scheme to support 8 core platforms. dts example (Quad-core AX45MP): plicsw: interrupt-controller@e6400000 { compatible = "andestech,plicsw"; reg = <0x00000000 0xe6400000 0x00000000 0x00400000>; interrupts-extended = <&CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>; interrupt-controller; #address-cells = <2>; #interrupt-cells = <2>; }; Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

lib: utils/timer: Add Andes fdt timer support

2022-10-23T04:56:39Z

Since we can get the PLMT base address and timer frequency from device tree, move plmt timer device to fdt timer framework. dts example (Quad-core AX45MP): cpus { ... timebase-frequency = <0x3938700>; ... } soc { ... plmt0@e6000000 { compatible = "andestech,plmt0"; reg = <0x00 0xe6000000 0x00 0x100000>; interrupts-extended = <&cpu0_intc 0x07 &cpu1_intc 0x07 &cpu2_intc 0x07 &cpu3_intc 0x07>; }; ... } Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel