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<title>opensbi.git/include/sbi_utils/ipi, branch master</title>
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<updated>2025-09-16T04:26:31Z</updated>
<entry>
<title>lib: utils/ipi: Convert IPI drivers as early drivers</title>
<updated>2025-09-16T04:26:31Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-09-04T05:24:10Z</published>
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<id>urn:sha1:cb70dffa0a726b68e9e84c52c07ad174f7ddac86</id>
<content type='text'>
The fdt_ipi_init() is already called from generic_early_init() so
let's convert IPI drivers as early drivers.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Tested-by: Nick Hu &lt;nick.hu@sifive.com&gt;
Link: https://lore.kernel.org/r/20250904052410.546818-4-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Use fdt_driver for initialization</title>
<updated>2024-11-28T12:12:05Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-11-11T22:02:51Z</published>
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<id>urn:sha1:5fa510c5f69f42d3b700e86c0db9e5bcebd3921c</id>
<content type='text'>
The ipi driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_ipi_init() performs a
best-effort initialization of all matching DT nodes.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: Drop IPI warm init and exit hooks</title>
<updated>2024-11-11T12:51:04Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-10-25T18:59:48Z</published>
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<id>urn:sha1:86d2c1797a44975e628bcf77e30e687fd6738e81</id>
<content type='text'>
Now that the SBI IPI core clears IPIs at warm boot in a generic way,
none of the drivers or platforms use these hooks, and we can remove
them. Platforms need only to initialize the driver once during cold
init. If other hooks are needed in the future, they can be added to
struct sbi_ipi_device.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_ipi: Move initial IPI clear to sbi_ipi_init()</title>
<updated>2024-11-11T12:48:35Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-10-25T18:59:47Z</published>
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<id>urn:sha1:693afc818feecdbddb75f5c9ec4b436d56f64208</id>
<content type='text'>
sbi_ipi_init() expects the platform warm init function to clear IPIs
on the local hart, but there is already a generic function to do this.
After this change, none of the existing drivers need a warm init
callback.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Constify FDT pointers in parsing functions</title>
<updated>2024-08-24T07:32:33Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-07-31T04:58:47Z</published>
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<id>urn:sha1:d561418f22f28b1eaedd5a51c338099c359743cf</id>
<content type='text'>
Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: ipi: Adjust Andes PLICSW to single-bit-per-hart scheme</title>
<updated>2023-12-06T11:53:27Z</updated>
<author>
<name>Leo Yu-Chi Liang</name>
<email>ycliang@andestech.com</email>
</author>
<published>2023-11-30T12:41:59Z</published>
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<id>urn:sha1:bd74931d79e1b81494a22b1ce368c935abbc0d2c</id>
<content type='text'>
The old scheme doesn't allow sending hart0 self-IPI as the
corresponding bit on pending register is hardwired to 0, this
could lead to unhandle IPIs on SMP systems, esp. on single-core.

Furthermore, the limitation of old scheme is 8-core, instead of
reserving source hart information, we assign bit (x + 1) as the
enable and pending bit of hartx, this also expands the bootable
hart number.

The following diagram shows the enable bits of the new scheme
on 32-core Andes platform.

   Pending regs: 0x1000  x---0---0---0---0------0---0
Pending hart ID:             0   1   2   3 ... 30  31
   Interrupt ID:         0   1   2   3   4 ... 31  32
                         |   |   |   |   |      |   |
    Enable regs: 0x2000  x---1---0---0---0-...--0---0---&gt; hart0
                         |   |   |   |   |      |   |
                 0x2080  x---0---1---0---0-...--0---0---&gt; hart1
                         |   |   |   |   |      |   |
                 0x2100  x---0---0---1---0-...--0---0---&gt; hart2
                         |   |   |   |   |      |   |
                 0x2180  x---0---0---0---1-...--0---0---&gt; hart3
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                 0x2f00  x---0---0---0---0-...--1---0---&gt; hart30
                         |   |   |   |   |      |   |
                 0x2f80  x---0---0---0---0-...--0---1---&gt; hart31
                         &lt;-------- word 0 -------&gt;&lt;--- word 1 ---&gt;

To send IPI to hart0, for example, another hart (including hart0
itself) will set bit 1 of first word on the pending register.

We also fix indentation in andes_plicsw.h along with this patch.

Fixes: ce7c490719ed ("lib: utils/ipi: Add Andes fdt ipi driver support")
Signed-off-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Randolph &lt;randolph@andestech.com&gt;
Reported-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005665.html
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Add Andes fdt ipi driver support</title>
<updated>2022-10-23T05:01:01Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2022-10-14T00:32:50Z</published>
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<id>urn:sha1:ce7c490719ed4e268979c8b6b54a5252396fbb3b</id>
<content type='text'>
Move Andes PLICSW ipi device to fdt ipi framework, this patch is based
on Leo's modified IPI scheme on PLICSW.

Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI
from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according
to spec. After some investigation, self-IPI seems to be seldom or never
used, so we re-order the IPI scheme to support 8 core platforms.

dts example (Quad-core AX45MP):

  plicsw: interrupt-controller@e6400000 {
          compatible = "andestech,plicsw";
          reg = &lt;0x00000000 0xe6400000 0x00000000 0x00400000&gt;;
          interrupts-extended = &lt;&amp;CPU0_intc 3
                                 &amp;CPU1_intc 3
                                 &amp;CPU2_intc 3
                                 &amp;CPU3_intc 3&gt;;
          interrupt-controller;
          #address-cells = &lt;2&gt;;
          #interrupt-cells = &lt;2&gt;;
  };

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Use kconfig for enabling/disabling drivers</title>
<updated>2022-08-08T04:03:45Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2022-08-08T04:03:45Z</published>
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<id>urn:sha1:76af9d40da21c4c67efb7730de263f914452fca0</id>
<content type='text'>
We update ipi drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate ipi
drivers for each platform.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Tested-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Acked-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Tested-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Add ACLINT MSWI library</title>
<updated>2021-06-24T04:09:44Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2021-05-20T07:30:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=5a049fe1d6a5d1c381113853fce3afad6573bb56'/>
<id>urn:sha1:5a049fe1d6a5d1c381113853fce3afad6573bb56</id>
<content type='text'>
We add common ACLINT MSWI library similar to the CLINT library
so that OpenSBI platforms can use it.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Simplify ipi platform operations</title>
<updated>2021-04-28T11:33:31Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2021-04-22T04:57:15Z</published>
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<id>urn:sha1:dc39c7b630a607b96c25f8ea50f0bb1af619928a</id>
<content type='text'>
Instead of having ipi_send() and ipi_clear() callbacks in
platform operations, it will be much simpler for ipi driver
to directly register these operations as a device to sbi_ipi
implementation.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
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