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<title>opensbi.git/include/sbi_utils/irqchip, branch v1.1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/include/sbi_utils/irqchip?h=v1.1</id>
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<updated>2022-06-13T06:24:06Z</updated>
<entry>
<title>lib: utils/irqchip: Add wrapper for T-HEAD PLIC delegation</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:54Z</published>
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<id>urn:sha1:5e5675874ca042fe977ffb27afcfa06cadc84b8b</id>
<content type='text'>
The delegation bit is lost along with the rest of the PLIC state when
the CPU power domain in the Allwinner D1 is powered down, so the PLIC
needs to be re-delegated to S-mode during the hart resume path.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Add FDT wrappers for PLIC save/restore functions</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:53Z</published>
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<id>urn:sha1:69be3dff9df767c19a461fadf73ad7331b4bdb4c</id>
<content type='text'>
These functions save/restore the state of the PLIC associated with the
current hart. The context save/restore functions only manipulate a
single context, since most likely the M-mode context is unused and does
not need to be saved.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: irqchip/plic: Add priority save/restore helpers</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:52Z</published>
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<id>urn:sha1:2b79b694a80513696daf072db0fd980e7573b212</id>
<content type='text'>
These can be used by platform code to save the PLIC priority state, if
it would otherwise be lost during non-retentive suspend. The platform
is responsible for allocating all necessary storage.

As a space optimization, store the saved priority values as 8-bit
integers, since that is large enough to hold any priority value on the
relevant platforms.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: irqchip/plic: Add context save/restore helpers</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=415ecf28f7ade7ba5a48a0cc9be8d45a7539dd89'/>
<id>urn:sha1:415ecf28f7ade7ba5a48a0cc9be8d45a7539dd89</id>
<content type='text'>
These can be used by platform code to save the PLIC context state, if
it would otherwise be lost during non-retentive suspend. The platform
is responsible for allocating all necessary storage.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: irqchip/plic: Factor out a context init function</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:50Z</published>
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<id>urn:sha1:8c362e7d065eaf4d55da23a190a464ba870f89aa</id>
<content type='text'>
This simplifies both the callers and the callees by removing duplicated
code and consolidating the error handling. It also fixes two bugs in the
process:
  1) ie_words was one too large when plic-&gt;num_src was a multiple of 32.
  2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA
     platforms previously only enabled one out of every 32 interrupts.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: irqchip/plic: Constify plic_data pointers</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:49Z</published>
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<id>urn:sha1:2ea7799d563ed9bbaf3b677728e928a6cd8f580c</id>
<content type='text'>
None of the functions modify the passed-in plic_data, so mark it const.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Add APLIC initialization library</title>
<updated>2022-02-15T15:07:55Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2021-04-08T05:58:02Z</published>
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<id>urn:sha1:99792653de29172890ace48e848330d389311199</id>
<content type='text'>
We add simple APLIC initialization library which is independent of
hardware description format (FDT or ACPI). This APLIC initialization
library can be used by custom OpenSBI platform support to setup
APLIC domains.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Add IMSIC library</title>
<updated>2022-02-15T15:06:24Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2021-04-20T11:03:40Z</published>
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<id>urn:sha1:9f73669959dd8ec2f1261b639f9540799dc976a1</id>
<content type='text'>
We add simple IMSIC library which is independent of hardware description
format (FDT or ACPI). This IMSIC library can be used by custom OpenSBI
platform support to setup IMSIC for external interrupts.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Allow PLIC functions to be used for multiple PLICs</title>
<updated>2020-05-23T05:06:29Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-12T07:27:52Z</published>
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<id>urn:sha1:446a9c6d1eb97fcedd6a94ac76d15e941a6087a8</id>
<content type='text'>
We extend all PLIC functions to have a "struct plic_data *"
parameter pointing to PLIC details. This allows platforms to
use these functions for multiple PLIC instances.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Remove redundant parameters from PLIC init functions</title>
<updated>2020-05-23T05:06:26Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-12T04:44:43Z</published>
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<id>urn:sha1:73d6ef3b2933ccf0b3a8a0ba110bf53ad9720b51</id>
<content type='text'>
The "target_hart" and "hart_count" parameters of PLIC cold and
warm init functions are only used for sanity checks and not
required in PLIC initialization.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
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