opensbi.git/include/sbi_utils/irqchip, branch v1.4

lib: utils/irqchip: Add shared MMIO region for PLIC in root domain

2023-12-19T10:26:37Z

On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel

lib: utils/irqchip: plic: Ensure no out-of-bound access in context save/restore helpers

2022-12-17T03:33:30Z

Currently the context save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

lib: utils/irqchip: plic: Ensure no out-of-bound access in priority save/restore helpers

2022-12-17T03:30:29Z

Currently the priority save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

lib: utils/irqchip: Use kconfig for enabling/disabling drivers

2022-08-08T04:03:52Z

We update irqchip drivers makefile to use kconfig for enabling/disabling drivers. To avoid compile errors, we also enable appropriate irqchip drivers for each platform. Signed-off-by: Anup Patel Tested-by: Andrew Jones Acked-by: Atish Patra Tested-by: Atish Patra

lib: utils/irqchip: Add wrapper for T-HEAD PLIC delegation

2022-06-13T06:24:06Z

The delegation bit is lost along with the rest of the PLIC state when the CPU power domain in the Allwinner D1 is powered down, so the PLIC needs to be re-delegated to S-mode during the hart resume path. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: utils/irqchip: Add FDT wrappers for PLIC save/restore functions

2022-06-13T06:24:06Z

These functions save/restore the state of the PLIC associated with the current hart. The context save/restore functions only manipulate a single context, since most likely the M-mode context is unused and does not need to be saved. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: irqchip/plic: Add priority save/restore helpers

2022-06-13T06:24:06Z

These can be used by platform code to save the PLIC priority state, if it would otherwise be lost during non-retentive suspend. The platform is responsible for allocating all necessary storage. As a space optimization, store the saved priority values as 8-bit integers, since that is large enough to hold any priority value on the relevant platforms. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: irqchip/plic: Add context save/restore helpers

2022-06-13T06:24:06Z

These can be used by platform code to save the PLIC context state, if it would otherwise be lost during non-retentive suspend. The platform is responsible for allocating all necessary storage. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: irqchip/plic: Factor out a context init function

2022-06-13T06:24:06Z

This simplifies both the callers and the callees by removing duplicated code and consolidating the error handling. It also fixes two bugs in the process: 1) ie_words was one too large when plic->num_src was a multiple of 32. 2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA platforms previously only enabled one out of every 32 interrupts. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: irqchip/plic: Constify plic_data pointers

2022-06-13T06:24:06Z

None of the functions modify the passed-in plic_data, so mark it const. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland