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<title>opensbi.git/include/sbi_utils, branch v1.7</title>
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<id>http://cgit.235523.xyz/opensbi.git/atom/include/sbi_utils?h=v1.7</id>
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<updated>2025-06-24T03:12:27Z</updated>
<entry>
<title>lib: utils: Add Implementation ID and Version as RPMI MPXY attributes</title>
<updated>2025-06-24T03:12:27Z</updated>
<author>
<name>Rahul Pathak</name>
<email>rpathak@ventanamicro.com</email>
</author>
<published>2025-06-18T05:38:53Z</published>
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<id>urn:sha1:a5fdef45dbd50d40162852a2b7333135fe3439be</id>
<content type='text'>
The latest frozen RPMI spec has added Implementation ID
and Implementation Version as message protocol specific
mpxy attributes. Add support for these.

Signed-off-by: Rahul Pathak &lt;rpathak@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250618053854.2577299-1-rpathak@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Fix fdt_mpxy_init() not returning error code</title>
<updated>2025-05-20T05:50:57Z</updated>
<author>
<name>Alvin Chang</name>
<email>alvinga@andestech.com</email>
</author>
<published>2025-04-30T09:10:07Z</published>
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<id>urn:sha1:2bb76326496440996b44bf20f3ceab127c7f72ae</id>
<content type='text'>
It seems that current implementation doesn't fail on fdt_mpxy_init(),
because platforms might not have any MPXY devices. In fact, if there are
no MPXY devices, fdt_driver_init_all() will return SBI_OK.

More importantly, if there is any MPXY device which fails the
initialization, OpenSBI must check the error code and stop the booting.
Thus, this commit adds the return value for fdt_mpxy_init().

Signed-off-by: Alvin Chang &lt;alvinga@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250430091007.3768180-1-alvinga@andestech.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/mpxy: Remove p2a_db_index from RPMI system MSI attributes</title>
<updated>2025-05-20T05:40:35Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-05-12T08:38:27Z</published>
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<id>urn:sha1:f3cce5b97f15f5ca87409902ca6a856b5012a5b3</id>
<content type='text'>
The discovery of P2A doorbell system MSI index is now through RPMI
shared memory DT node so remove p2a_db_index from RPMI system MSI
attributes and access it as a mailbox channel attribute.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250512083827.804151-5-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/mailbox: Parse P2A doorbell system MSI index from DT</title>
<updated>2025-05-20T05:40:35Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-05-12T08:38:25Z</published>
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<id>urn:sha1:a79566175c01e369d9c5536aa9accbb5c17e2376</id>
<content type='text'>
The P2A doorbell system MSI index is expected to be discovered from
device tree instead of RPMI system MSI service group attribute. This
is based on ARC feedback before RPMI spec was frozen.

Let's parse P2A doorbell system MSI index from device tree and also
expose it as rpmi channel attribute to RPMI client drivers.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250512083827.804151-3-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Set the scratch allocation to alignment to cacheline size</title>
<updated>2025-04-24T03:53:47Z</updated>
<author>
<name>Raj Vishwanathan</name>
<email>raj.vishwanathan@gmail.com</email>
</author>
<published>2025-04-23T22:50:45Z</published>
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<id>urn:sha1:99aabc6b8431a2bcf2b28a2423952e529de9fbc5</id>
<content type='text'>
Set the scratch allocation alignment to cacheline size specified by
riscv,cbom-block-size in the DTS file to avoid two atomic variables
from the same cache line causing livelock on some platforms. If the
cacheline is not specified, we set it a default value.

Signed-off-by: Raj Vishwanathan &lt;Raj.Vishwanathan@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Link: https://lore.kernel.org/r/20250423225045.267983-1-Raj.Vishwanathan@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Remove fdt_match_node()</title>
<updated>2025-04-23T07:02:51Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-03-25T23:43:32Z</published>
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<id>urn:sha1:0dd8a26f1f3a6091a2ea6e4175fd63a79bba86d9</id>
<content type='text'>
This function has been obsoleted by the fdt_driver library and is no
longer used.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250325234342.711447-10-samuel.holland@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/serial: Add PXA UARTs support</title>
<updated>2025-03-27T14:50:05Z</updated>
<author>
<name>Junhui Liu</name>
<email>junhui.liu@pigmoral.tech</email>
</author>
<published>2025-03-27T06:48:18Z</published>
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<id>urn:sha1:8fe835303c4c7d134f07002c234ec5ec637953ca</id>
<content type='text'>
The PXA variant of the uart8250 adds the UART Unit Enable bit (UUE) that
needs to be set to enable the XScale PXA UART. And it is required for
some RISC-V SoCs like the Spacemit K1 that implement the PXA UART.

This introduces the "intel,xscale-uart" compatible to handle setting the
UUE bit.

Signed-off-by: Junhui Liu &lt;junhui.liu@pigmoral.tech&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250327-pxa-uart-support-v2-1-c4400c1fcd0b@pigmoral.tech
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Allocate fdt_pmu_evt_select on the heap</title>
<updated>2025-02-19T12:55:17Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-13T22:48:39Z</published>
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<id>urn:sha1:a2c172f526b52eb428d9077fab8cd8690c7e2f19</id>
<content type='text'>
This reduces .bss size by 8 KiB, and should reduce overall memory usage
since most platforms will have significantly fewer than 512 entries in
this table. At the same time, it removes the fixed table size limit.
Since the table is only used within fdt_pmu.c, instead of updating the
extern declaration, make the table local to this file.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Add MPXY RPMI mailbox driver for System MSI service group</title>
<updated>2025-02-13T05:40:03Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-01-12T13:09:52Z</published>
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<id>urn:sha1:61abd975f22f96ac900c3482945bdc2f82f6a9f6</id>
<content type='text'>
The supervisor software can directly receive most of the system MSIs
except P2A doorbell and MSIs preferred to be handled in M-mode.

Add MPXY RPMI mailbox client driver for the System MSI service group.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>include: sbi_utils: Update RPMI service group IDs and BASE service group</title>
<updated>2025-02-13T05:40:03Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-01-11T15:23:05Z</published>
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<id>urn:sha1:b05e2a19568e449969318597ca77c27c25aac518</id>
<content type='text'>
The service group ID assignment and some of the BASE services have
changes in the latest RPMI specification so let's update the RPMI
implementation accordingly.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
</content>
</entry>
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