<feed xmlns='http://www.w3.org/2005/Atom'>
<title>opensbi.git/include, branch v1.7</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/include?h=v1.7</id>
<link rel='self' href='http://cgit.235523.xyz/opensbi.git/atom/include?h=v1.7'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/'/>
<updated>2025-06-30T03:07:30Z</updated>
<entry>
<title>include: Bump-up version to 1.7</title>
<updated>2025-06-30T03:07:30Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-06-30T03:07:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=a32a91069119e7a5aa31e6bc51d5e00860be3d80'/>
<id>urn:sha1:a32a91069119e7a5aa31e6bc51d5e00860be3d80</id>
<content type='text'>
Update the OpenSBI version to 1.7 as part of release preparation.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Add Implementation ID and Version as RPMI MPXY attributes</title>
<updated>2025-06-24T03:12:27Z</updated>
<author>
<name>Rahul Pathak</name>
<email>rpathak@ventanamicro.com</email>
</author>
<published>2025-06-18T05:38:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=a5fdef45dbd50d40162852a2b7333135fe3439be'/>
<id>urn:sha1:a5fdef45dbd50d40162852a2b7333135fe3439be</id>
<content type='text'>
The latest frozen RPMI spec has added Implementation ID
and Implementation Version as message protocol specific
mpxy attributes. Add support for these.

Signed-off-by: Rahul Pathak &lt;rpathak@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250618053854.2577299-1-rpathak@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_platform: Add platform specific pmp_set() and pmp_disable()</title>
<updated>2025-06-17T04:04:01Z</updated>
<author>
<name>Chao-ying Fu</name>
<email>cfu@wavecomp.com</email>
</author>
<published>2025-06-14T17:27:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=13abda516928a8823e6b7b65b0a29bb338484227'/>
<id>urn:sha1:13abda516928a8823e6b7b65b0a29bb338484227</id>
<content type='text'>
Allow platforms to implement platform specific PMP setup and
PMP disable functions which are called before actual PMP CSRs
are configured.

Also, implement pmp_set() and pmp_disable() for MIPS P8700.

Signed-off-by: Chao-ying Fu &lt;cfu@mips.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250614172756.153902-1-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: dbtr: Fix update_triggers to match SBI</title>
<updated>2025-06-16T11:31:52Z</updated>
<author>
<name>Jesse Taube</name>
<email>jesse@rivosinc.com</email>
</author>
<published>2025-05-28T15:46:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=324021423d063702a5cb2d4207a3a9c4e999549f'/>
<id>urn:sha1:324021423d063702a5cb2d4207a3a9c4e999549f</id>
<content type='text'>
OpenSBI implements sbi_dbtr_update_trig as
`sbi_dbtr_update_trig(unsigned long trig_idx_base,
                      unsigned long trig_idx_mask)`
yet SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] declares it as
`sbi_debug_update_triggers(unsigned long trig_count)`

Change update_triggers to match SBI.

[0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc

Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support")
Signed-off-by: Jesse Taube &lt;jesse@rivosinc.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Tested-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Reviewed-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250528154604.571815-1-jesse@rivosinc.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: dbtr: Fix shared memory layout</title>
<updated>2025-06-16T04:44:20Z</updated>
<author>
<name>Jesse Taube</name>
<email>jesse@rivosinc.com</email>
</author>
<published>2025-06-04T13:52:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=033e0e2353ddab76039e62b46c9f77e178bac689'/>
<id>urn:sha1:033e0e2353ddab76039e62b46c9f77e178bac689</id>
<content type='text'>
The existing sbi_dbtr_shmem_entry has a size of 5 * XLEN with the final
entry being idx. This is in contrast to the SBI v3.0-rc7 Chapter 19.
Debug Triggers Extension [0] where idx and trig_state share the same
offset (0) in shared memory, with a total size of 4 * XLEN for all the
SBI calls.

Replace struct with union to match memory layout described in SBI.

[0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc

Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support")
Signed-off-by: Jesse Taube &lt;jesse@rivosinc.com&gt;
Reviewed-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Tested-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Tested-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250604135225.842241-1-jesse@rivosinc.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Revert entry_count before doing hsm stop in hsm wait loop</title>
<updated>2025-06-16T04:10:28Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-05-27T12:48:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=7dd09bfeca310f540d73e29c600958faead0849e'/>
<id>urn:sha1:7dd09bfeca310f540d73e29c600958faead0849e</id>
<content type='text'>
Using hsm stop in hsm wait loop causes secondary harts to be stuck
forever in OpenSBI on RISC-V platforms where HSM hart hotplug is
available and all harts come-up at the same time during system
power-on.

For example, lets say we have two harts A and B on a RISC-V platform
with HSM hart hotplug which come-up at the same time during system
power-on. The hart A enters OpenSBI before hart B hence it becomes
the primary (or cold-boot) hart whereas hart B becomes the secondary
(or warm-boot) hart. The hart A follows the OpenSBI cold-boot path
and registers hsm device before hart B enters OpenSBI. The hart B
eventually enters OpenSBI and follows the OpenSBI warm-boot path
so it will increment it's own entry_count before entering hsm wait
loop where it sees hsm device and stops itself. Later as part of
the Linux boot-up sequence, hart A issues SBI HSM start call to
bring-up hart B but OpenSBI sees entry_count != init_count for
hart B in sbi_hsm_hart_start() hence hsm_device_hart_start() is
not called for hart B resulting in hart B stuck forever in OpenSBI.

To fix the above issue, revert entry_count before doing hsm stop
in hsm wait loop.

Fixes: d844deadec94 ("lib: sbi: Use hsm stop for hsm wait")
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Nick Hu &lt;nick.hu@sifive.com&gt;
Link: https://lore.kernel.org/r/20250527124821.2113467-1-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: sbi: Change SBI spec version to 3.0</title>
<updated>2025-05-20T08:17:34Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-05-16T12:28:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=d4f5a16598ae4469ee9355a13366292758901c17'/>
<id>urn:sha1:d4f5a16598ae4469ee9355a13366292758901c17</id>
<content type='text'>
Now that SBI v3.0 specification is frozen, change runtime SBI version
implemented by OpenSBI to v3.0. Also, mark extensions defined by the
SBI v3.0 specification as non-experimental.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250516122844.113423-1-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: hart: Detect existence of cycle and instret CSRs for Zicntr</title>
<updated>2025-05-20T07:55:53Z</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-05-16T13:33:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=7e31dc80525f752d97c2c5a97eb4b9583054e8bc'/>
<id>urn:sha1:7e31dc80525f752d97c2c5a97eb4b9583054e8bc</id>
<content type='text'>
Zicntr extension specifies three read-only CSRs, time, cycle and
instret. It isn't sufficient to report Zicntr is fully supported with
only time CSR detected.

This patch introduces a bitmap to sbi_hart_features to record
availability of these CSRs, which are detected using traps. Zicntr is
reported as present if and only if three CSRs are all available on the
HARTs.

Sites originally depending on SBI_HART_EXT_ZICNTR for detecting
existence of time CSR are switched to detect SBI_HART_CSR_TIME instead.

Suggested-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250516133352.36617-3-ziyao@disroot.org
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Fix fdt_mpxy_init() not returning error code</title>
<updated>2025-05-20T05:50:57Z</updated>
<author>
<name>Alvin Chang</name>
<email>alvinga@andestech.com</email>
</author>
<published>2025-04-30T09:10:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=2bb76326496440996b44bf20f3ceab127c7f72ae'/>
<id>urn:sha1:2bb76326496440996b44bf20f3ceab127c7f72ae</id>
<content type='text'>
It seems that current implementation doesn't fail on fdt_mpxy_init(),
because platforms might not have any MPXY devices. In fact, if there are
no MPXY devices, fdt_driver_init_all() will return SBI_OK.

More importantly, if there is any MPXY device which fails the
initialization, OpenSBI must check the error code and stop the booting.
Thus, this commit adds the return value for fdt_mpxy_init().

Signed-off-by: Alvin Chang &lt;alvinga@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250430091007.3768180-1-alvinga@andestech.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/mpxy: Remove p2a_db_index from RPMI system MSI attributes</title>
<updated>2025-05-20T05:40:35Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-05-12T08:38:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=f3cce5b97f15f5ca87409902ca6a856b5012a5b3'/>
<id>urn:sha1:f3cce5b97f15f5ca87409902ca6a856b5012a5b3</id>
<content type='text'>
The discovery of P2A doorbell system MSI index is now through RPMI
shared memory DT node so remove p2a_db_index from RPMI system MSI
attributes and access it as a mailbox channel attribute.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250512083827.804151-5-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
</feed>
