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<title>opensbi.git/include, branch v1.8.1</title>
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<updated>2026-01-08T07:10:32Z</updated>
<entry>
<title>include: sbi_scratch: fix typo sbi_scratch -&gt; HART id</title>
<updated>2026-01-08T07:10:32Z</updated>
<author>
<name>Leo Yu-Chi Liang</name>
<email>ycliang@andestech.com</email>
</author>
<published>2026-01-07T03:26:02Z</published>
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<id>urn:sha1:65fac653113bcd1ac86ac85f44138caa69ad3d9a</id>
<content type='text'>
Fix "sbi_scratch" to "HART id" to better reflect its purpose.

Signed-off-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260107032602.1143819-1-ycliang@andestech.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: Bump-up version to 1.8</title>
<updated>2025-12-29T06:54:16Z</updated>
<author>
<name>Anup Patel</name>
<email>anup@brainfault.org</email>
</author>
<published>2025-12-29T06:54:16Z</published>
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<id>urn:sha1:e7fa66c2160ec139de1853a00f669c09320a9256</id>
<content type='text'>
Update the OpenSBI version to 1.8 as part of release preparation.

Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: Fix LLVM compile error in sbi_utils/hsm/fdt_hsm_sifive_inst.h</title>
<updated>2025-12-28T15:17:12Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@oss.qualcomm.com</email>
</author>
<published>2025-12-27T10:09:16Z</published>
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<id>urn:sha1:9a46ef43a45ee1c462c17a0fa62e03c955911192</id>
<content type='text'>
Currently, OpenSBI fails to compile for LLVM=1 using 2025.11.27
riscv-gnu-toolchain with the following error:

In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:17:23: error: expected instruction format
   17 |         __asm__ __volatile__(".insn 0xfc000073" ::: "memory");
      |                              ^
&lt;inline asm&gt;:1:8: note: instantiated into assembly here
    1 |         .insn 0xfc000073
      |               ^
In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:12:23: error: expected instruction format
   12 |         __asm__ __volatile__(".insn 0x30500073" ::: "memory");
      |                              ^
&lt;inline asm&gt;:1:8: note: instantiated into assembly here
    1 |         .insn 0x30500073
      |               ^
2 errors generated.

To fix this compile error, use ".word" in-place ".insn".

Fixes: 1514a327306b ("lib: utils/hsm: Add SiFive TMC0 driver")
Signed-off-by: Anup Patel &lt;anup.patel@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20251227100916.327524-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>include: riscv_asm: Optimize csr_xyz() macros to reduce stack usage</title>
<updated>2025-12-27T05:51:27Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2025-12-16T05:25:28Z</published>
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<id>urn:sha1:4c1c77e085599f6f95df4b94714e1d7829ebefbf</id>
<content type='text'>
When using debug builds, aka., DEBUG=1, csr_write_num() function can
trigger stack overflow. This is caused by the large amount of macro
expansion of csr_write(...), which, under debug builds, will generate
massive amount of stack variables (tested with GCC 13.2.0). The issue
is masked previously as we didn't have too many csr_write()'s before
commit 55296fd27c0c, but now, it does overflow the default 4KB stack.

The csr_read(relaxed) macros already use the "register" modifier to
optimize stack usage (perhaps unknowingly?), so this patch just
follows suit.

Fixes: 55296fd27c0c ("lib: Allow custom CSRs in csr_read_num() and csr_write_num()")
Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251216052528.18896-1-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/serial: Support multiple UART8250 devices</title>
<updated>2025-12-21T15:32:44Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2025-12-18T10:42:42Z</published>
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<id>urn:sha1:fbff3a7e0784a5bd42e87656e6d50cea94dfcff5</id>
<content type='text'>
Previously we assume only 1 UART8250 instance can be used. Now we support
multiple instances by introducing counterpart functions to putc/getc/init
which take an extra *dev parameter, and name them as uart8250_device_xyz()
The original functions without the *dev parameter will operate on the
default instance exactly the same as before, so no changes on the caller
is required.

Note: uart8250_device_init only does device initialization without the
console registration logic.

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251218104243.562667-7-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: give platform choice of using single memregion to cover OpenSBI</title>
<updated>2025-12-21T15:03:23Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2025-12-18T10:42:40Z</published>
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<id>urn:sha1:878c2676e633ff05a8275c2ff76254990e120bed</id>
<content type='text'>
By default the OpenSBI itself is covered by 2 memregions for RX/RW
sections. This is required by platforms with Smepmp to enforce
proper permissions in M mode. Note: M-mode only regions can't
have RWX permissions with Smepmp. Platforms with traditional PMPs
won't be able to benefit from it, as both regions are effectively
RWX in M mode, but usually it's harmless to so. Now we provide
these platforms with an option to disable this logic. It saves 1
PMP entry. For platforms really in short of PMPs, it does make a
difference.

Note: Platform requesting single OpenSBI memregion must be using
      traditional (old) PMP. We expect the platform code to do
      the right thing.

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251218104243.562667-5-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_domain: make is_region_subset public</title>
<updated>2025-12-21T15:03:20Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2025-12-18T10:42:39Z</published>
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<id>urn:sha1:ed1deab09ef6284d018fbf37ab397dcd4b9f82b8</id>
<content type='text'>
The helper function is renamed as sbi_domain_memregion_is_subset,
and made public in header file.

Also add a convenient helper of sbi_domain_for_each_memregion_idx.

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251218104243.562667-4-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_domain: add sbi_domain_get_oldpmp_flags</title>
<updated>2025-12-21T15:03:18Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2025-12-18T10:42:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=2c1bf5bb73194ca035bcd5ab3fbc6653de3162e1'/>
<id>urn:sha1:2c1bf5bb73194ca035bcd5ab3fbc6653de3162e1</id>
<content type='text'>
Factor out logic in `sbi_hart_oldpmp_configure` into function
`sbi_domain_get_oldpmp_flags`, analogous to `sbi_domain_get_smepmp_flags`.
Platform specific hart-protection implementation can now leverage it.

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251218104243.562667-3-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi_hart_pmp: make sbi_hart_pmp_fence public</title>
<updated>2025-12-21T15:03:16Z</updated>
<author>
<name>Bo Gan</name>
<email>ganboing@gmail.com</email>
</author>
<published>2025-12-18T10:42:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=707aa3231af8c19779e8ca07a950c3a6b331489a'/>
<id>urn:sha1:707aa3231af8c19779e8ca07a950c3a6b331489a</id>
<content type='text'>
sbi_hart_pmp_fence can now be utilized by other hart-protection
implementation.

Signed-off-by: Bo Gan &lt;ganboing@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251218104243.562667-2-ganboing@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Expose __sbi_sfence_vma_all() function</title>
<updated>2025-12-16T14:49:21Z</updated>
<author>
<name>Andrew Waterman</name>
<email>andrew@sifive.com</email>
</author>
<published>2025-11-27T11:21:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=843e916dcab4163e84bab9a22ef2db89ff269979'/>
<id>urn:sha1:843e916dcab4163e84bab9a22ef2db89ff269979</id>
<content type='text'>
The __sbi_sfence_vma_all() can be shared by different parts of
OpenSBI so rename __tlb_flush_all() to __sbi_sfence_vma_all()
and make it global function.

Signed-off-by: Andrew Waterman &lt;andrew@sifive.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20251127112121.334023-2-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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