opensbi.git/include, branch v1.9

include: Bump-up version to 1.9

2026-06-30T14:19:54Z

Update the OpenSBI version to 1.9 as part of release preparation. Signed-off-by: Anup Patel

lib: sbi: Rework misaligned vector load/store

2026-06-17T06:13:38Z

Fix the following issues with misaligned vector load/store: a. Stack overflow: the mask[VLEN_MAX / 8] variable consumes 8K stack space, given VLEN_MAX=65536, overflowing the default-sized stack. There's no need to fetch the whole mask in one go, instead, make it on-demand. Use a 128-byte mask as local buffer to hold the sliding window of mask. For rvv load, this is allowed -- from the spec: "The destination vector register group for a masked vector instruction cannot overlap the source mask register (v0), unless the destination vector register is being written with a mask value (e.g., compares) or the scalar result of a reduction" We don't need to worry about the mask getting overwritten. b. Maintain the value of vstart upon abort (uptrap) to avoid duplicate work. After fault resolution, the instruction can restart from the faulting vstart. For Fault-Only-First loads, reset vstart to 0, as previously done so, to conform to spec. c. Explicitly set VS dirty in VSSTATUS with SET_VS_DIRTY() if faulting from V=1, and if any vector register, including vstart/vl/vtype, gets changed in the handler. It can add 1 unnecessary op to set VS dirty in M/SSTATUS (not VSSTATUS), where the HW already did, but for code simplicity, do it anyway. The overhead should be negligible. Signed-off-by: Bo Gan Tested-by: Anirudh Srinivasan Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260609060024.706-5-ganboing@gmail.com Signed-off-by: Anup Patel

lib: sbi: Add variable-length unprivilege access functions

2026-06-17T06:11:11Z

sbi_load/store_loop read/write variable-length buffer unprivileged. Both function use the widest aligned 8/4/2/1 byte load/stores in each loop to reduce the total number of iterations. Also switch the scalar/vector misaligned handlers to make use of such functions to simplify code. Miscellaneous: remove the unnecessary [taddr] in inline assembly Signed-off-by: Bo Gan Tested-by: Anirudh Srinivasan Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260609060024.706-4-ganboing@gmail.com Signed-off-by: Anup Patel

lib: sbi: Rework and split sbi_misaligned(_v)_tinst_fixup

2026-06-17T06:07:19Z

The load/store address offset between the uptrap and the orig_trap can be derived by orig_trap->tval - uptrap->tval, thus refactor the function prototype for simplicity. For vector load, sbi_misaligned_v_tinst_fixup is introduced. There's no transformed instruction for vector load/store, so null out tinst if the fault is not a guest-page fault. Signed-off-by: Bo Gan Tested-by: Anirudh Srinivasan Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260609060024.706-3-ganboing@gmail.com Signed-off-by: Anup Patel

lib: sbi: Make per-HART stack size configurable via Kconfig

2026-06-16T13:51:11Z

The per-HART stack size for exception/interrupt handling is currently hardcoded to 8192 bytes in SBI_PLATFORM_DEFAULT_HART_STACK_SIZE. This may not be sufficient for platforms with deeper call stacks (e.g. those enabling additional SBI extensions) or may be wasteful for minimal platforms. Introduce a HART_STACK_SIZE Kconfig option in lib/sbi/Kconfig with a valid range of 8192 to 1048576 bytes and a default of 8192 bytes to preserve existing behavior. The SBI_PLATFORM_DEFAULT_HART_STACK_SIZE macro now resolves to CONFIG_HART_STACK_SIZE, allowing all platforms to benefit from a single configuration knob without any source changes. Signed-off-by: Oriol Catalan Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/VI0P192MB3062735A6194BB6DA72083499E002@VI0P192MB3062.EURP192.PROD.OUTLOOK.COM Signed-off-by: Anup Patel

lib: sbi: Do not override emulator callback for vector load/store

2026-06-16T07:55:27Z

It's wrong to override the emulator callback in sbi_trap_emulate_load/ store. The function must respect the callback function passed in the parameter. Hence, let the misaligned emulator callback decide when to use sbi_misaligned_v_ld/st_emulator. To clean up things, also make the following changes: - Add the `insn` parameter to the callback. The trapping insn has been fetched by the caller already, whether transformed or directly loaded, thus saving the trouble in the callback. Note that you must not rely on the length of the `insn`, as it can be a transformed one from tinst - Also the `tcntx` is added, providing the callback with register values to handle vector insn or other customized insns. - Clarify that the read/write length (rlen/wlen) can be 0, in which case it could be a vector load/store or some customized instruction. The callback is responsible to handle it accordingly. Also fixed issues in the sbi_misaligned_v_ld/st_emulator: a. Redirect the trap when OPENSBI_CC_SUPPORT_VECTOR is not available. b. Ensure the return code is >0 when no faults are redirected. Fixes: c2acc5e5b0d8 ("lib: sbi_misaligned_ldst: Add handling of vector load/store") Signed-off-by: Bo Gan Reviewed-by: Anup Patel Tested-by: Anirudh Srinivasan Link: https://lore.kernel.org/r/20260605113214.242-6-ganboing@gmail.com Signed-off-by: Anup Patel

include: sbi: set FS dirty in vsstatus when V=1

2026-06-16T07:01:01Z

According to Privileged ISA 19.2.11: Modifying the floating-point state when V=1 causes both fields (vsstatus.FS and the HS-level sstatus.FS) to be set to 3 (Dirty) Fixes: 130e65dd9d44 ("lib: sbi: Implement SET_FS_DIRTY() to make sure the mstatus FS dirty is set") Signed-off-by: Bo Gan Reviewed-by: Anup Patel Tested-by: Anirudh Srinivasan Link: https://lore.kernel.org/r/20260605113214.242-5-ganboing@gmail.com Signed-off-by: Anup Patel

include: sbi: Add GET_RDS_NUM/SET(_FP32/_FP64)_RDS macros

2026-06-16T07:00:22Z

These macros can be used to decode rd' and set rd' in RVC instructions Signed-off-by: Bo Gan Reviewed-by: Anup Patel Tested-by: Anirudh Srinivasan Link: https://lore.kernel.org/r/20260605113214.242-4-ganboing@gmail.com Signed-off-by: Anup Patel

include: sbi: Add sbi_regs_prev_xlen

2026-06-16T06:59:59Z

sbi_regs_prev_xlen reports the xlen of previous mode by decoding from multiple CSRs including mstatus/hstatus/vsstatus Signed-off-by: Bo Gan Reviewed-by: Anup Patel Tested-by: Anirudh Srinivasan Link: https://lore.kernel.org/r/20260605113214.242-3-ganboing@gmail.com Signed-off-by: Anup Patel

include: sbi: Add more mstatus and instruction encoding

2026-06-16T06:59:29Z

- Add MXL encoding for calculating XLEN. - Add instruction encoding for c.lbu/c.sb, and imm encoding for multiple RVC insn. Signed-off-by: Bo Gan Reviewed-by: Anup Patel Tested-by: Anirudh Srinivasan Link: https://lore.kernel.org/r/20260605113214.242-2-ganboing@gmail.com Signed-off-by: Anup Patel