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<title>opensbi.git/lib/sbi/objects.mk, branch v1.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2021-07-11T05:08:02Z</updated>
<entry>
<title>lib: sbi: Implement SBI PMU extension</title>
<updated>2021-07-11T05:08:02Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2021-07-10T16:18:13Z</published>
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<id>urn:sha1:37f9b0f2f265b2f312d974fb8d100b85b3faf94f</id>
<content type='text'>
RISC-V SBI specfication 0.3 defines a PMU extension that allows supervisor
mode to start/stop/configure pmu related events. This patch implements
all of the functionality defined in the specification.

Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add PMU support</title>
<updated>2021-07-11T04:53:18Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2021-07-10T16:18:11Z</published>
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<id>urn:sha1:13d40f21d588e17a31624ed415f114987b6bd3d0</id>
<content type='text'>
RISC-V SBI v0.3 specification defined a PMU extension to configure/start/stop
the hardware/firmware pmu events.

Implement PMU support in OpenSBI library. The implementation is agnostic of
event to counter mapping &amp; mhpmevent value configuration. That means, it
expects platform hooks will be used to set up the mapping and provide
the mhpmevent value at runtime.

Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add initial domain support</title>
<updated>2020-10-20T05:52:15Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-09-18T11:37:49Z</published>
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<id>urn:sha1:b1678af210dc4b4e6d586d6d96617e9641618994</id>
<content type='text'>
An OpenSBI domain is a logical entity representing a set of HARTs
and a set of memory regions for these HARTs.

The OpenSBI domains support will allow OpenSBI platforms and previous
booting stage (i.e. U-Boot SPL, Coreboot, etc) to partition a system
into multiple domains where each domain will run it's own software.

For inter-domain isolation, OpenSBI will eventually use various HW
features such as PMP, ePMP, IOPMP, SiFive shield, etc but initial
implementation only use HW PMP support.

This patch provides initial implementation of OpenSBI domains where
we have a root/default domain and OpenSBI platforms can provide
non-root/custom domains using domain_get() callback.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Add platform features in boot time print</title>
<updated>2020-05-10T04:54:08Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-05-09T23:47:31Z</published>
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<id>urn:sha1:1f235ec47f85ba90916493c7eb1378b5427a66b5</id>
<content type='text'>
We have now clear distinction between platform and hart features.
Modify the boot print messages to print platform features in a string
format. In the process, this patch moved relatively larger functions
to its own file from platform.h header file.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Tested-by: Jonathan Balkind &lt;jbalkind@cs.princeton.edu&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Create a separate math helper function file</title>
<updated>2020-05-10T04:29:24Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-05-09T23:47:25Z</published>
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<id>urn:sha1:13ca20d8df3b402d12e5701c651a53409db167d8</id>
<content type='text'>
There may be few common mathematics helper functions which can be used
anywhere in OpenSBI project.

Add a separate math helper function file to add these functions.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Rename unprivileged trap handler</title>
<updated>2020-05-10T04:29:16Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-05-09T23:47:23Z</published>
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<id>urn:sha1:63a513edeccee1758bbfe5111ccc4fbec8f18a12</id>
<content type='text'>
Unprivileged trap handler can be reused for any cases where the executing
code expects a trap.

Rename it to "expected" trap handler as it will be used in other cases in
future.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Tested-by: Jonathan Balkind &lt;jbalkind@cs.princeton.edu&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Optimize unpriv load/store implementation</title>
<updated>2020-03-28T08:01:53Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-19T11:43:16Z</published>
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<id>urn:sha1:1de66d170e71fb94732ffc80dcf4e70e623c4f7a</id>
<content type='text'>
This patch optimize unpriv load/store implementation by having
dedicated unpriv trap handler (just like KVM RISC-V).

As a result of this optimization:
1. We have reduced roughly 13+ instruction in all unpriv load/store
   functions. The reduced instruction also include two function calls.
2. Per-HART trap info pointer in scratch space is now redundant
   hence removed.
3. The sbi_trap_handler() is now much cleaner because we don't have
   to handle unpriv load/store traps.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Simple bitmap library</title>
<updated>2020-03-11T09:59:45Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-04T06:59:15Z</published>
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<id>urn:sha1:3226bd93ce41ed0c815a9021f5e489cfe3e83fa3</id>
<content type='text'>
We add simple bitmap library which will help us create and maintain
bitmaps. It will also help us create a simple HART mask library.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Sort build objects in alphabetical order</title>
<updated>2020-03-10T04:32:48Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-09T02:17:57Z</published>
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<id>urn:sha1:2abc55bb3956a9ff0384b086158d242ea0d6414b</id>
<content type='text'>
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: sbi_bitops: More useful bit operations</title>
<updated>2020-03-08T05:39:46Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-04T06:18:31Z</published>
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<id>urn:sha1:a148996a7f9097a1f8e43cc62bd65972b008cad4</id>
<content type='text'>
This patch extends our bit operation library with mechanism to:
1. Iteratively traverse bits
2. Set bit
3. Clear bit
4. Change bit
5. ... other helpful functions ...

Most the above is adopted from Xvisor sources.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
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