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<title>opensbi.git/lib/sbi/riscv_asm.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/sbi/riscv_asm.c?h=master</id>
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<updated>2026-06-10T12:25:33Z</updated>
<entry>
<title>lib: sbi: Move hart PMP functions to sbi_hart_pmp.c</title>
<updated>2026-06-10T12:25:33Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=a59c8fb9fb0ee4b56268b84cf94d6a5d66ead514'/>
<id>urn:sha1:a59c8fb9fb0ee4b56268b84cf94d6a5d66ead514</id>
<content type='text'>
The sbi_hart_pmp.c looks like a good place for the hart PMP CSR
access functions.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-9-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add hart_ prefix to PMP functions</title>
<updated>2026-06-10T12:07:49Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:24Z</published>
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<id>urn:sha1:63350c6ea6a9ba8097b15c7159a00c428377623c</id>
<content type='text'>
PMP functions that deal with hart PMP CSRs are given a sbi_hart_ prefix,
to distinguish from RISC-V PMP encoding functions.

The is_pmp_entry_mapped() function is changed a little more, to align
with other PMP conventions, and made to return a bool to make it more
obvious that it returns a bool and not an SBI_ return code.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-8-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add sbi_pmp_is_enabled() helper</title>
<updated>2026-06-10T07:55:29Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:23Z</published>
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<id>urn:sha1:f7738cc1e5cea8cae6919810407a8903248ad497</id>
<content type='text'>
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-7-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add PMP CSR read and write accessors</title>
<updated>2026-06-10T07:53:18Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=8f1a6164f2b81fe08d67c09400d9f7b9019c58df'/>
<id>urn:sha1:8f1a6164f2b81fe08d67c09400d9f7b9019c58df</id>
<content type='text'>
PMPCFG CSR access is non-trivial as it requires shifting and masking, it
makes PMP manipulation code simpler if this basic CSR read/write access is
abstracted away.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-6-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Move RISC-V PMP encoding functions to sbi_pmp.c</title>
<updated>2026-06-10T07:47:30Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:20Z</published>
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<id>urn:sha1:e9797b5e574c87332679a30e542b519c93e650ca</id>
<content type='text'>
Create a new file for handling the RISC-V PMP format and the new pmp_t
type, as opposed to hart PMP CSR specific access.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-4-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: split PMP encoding and CSR access</title>
<updated>2026-06-10T04:27:58Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:19Z</published>
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<id>urn:sha1:c93a89f214ecbad7af3de54842ee93960aaf0d15</id>
<content type='text'>
Allow PMP encoding functions to be shared with non-hart PMP manipulation
by splitting encoding / decoding and hart PMP CSR access into their own
functions.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-3-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Introduce pmp_t type</title>
<updated>2026-06-10T04:26:29Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2026-04-30T04:55:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=8ae3b0985a17ee7b955d4352cdd01ac6c8dd9f46'/>
<id>urn:sha1:8ae3b0985a17ee7b955d4352cdd01ac6c8dd9f46</id>
<content type='text'>
To help abstract details of PMP encoding and access, add a new pmp_t
type which contains address and cfg in the format of the riscv CSRs.
There is no functional change.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260430045528.420437-2-npiggin@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: Allow custom CSRs in csr_read_num() and csr_write_num()</title>
<updated>2025-10-21T14:04:09Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-09-30T15:32:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=55296fd27c0ce12a2024c7eacfdbab2dfd39476b'/>
<id>urn:sha1:55296fd27c0ce12a2024c7eacfdbab2dfd39476b</id>
<content type='text'>
Some of the platforms use platform specific CSR access functions for
configuring implementation specific CSRs (such as PMA registers).

Extend the common csr_read_num() and csr_write_num() to allow custom
CSRs so that platform specific CSR access functions are not needed.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250930153216.89853-1-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: check result of pmp_get() in is_pmp_entry_mapped()</title>
<updated>2024-08-02T03:15:10Z</updated>
<author>
<name>Carlos López</name>
<email>carlos.lopezr4096@gmail.com</email>
</author>
<published>2024-08-01T12:58:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=6a090ee9dc687bb4f39c56a6fd77898257c0f6d7'/>
<id>urn:sha1:6a090ee9dc687bb4f39c56a6fd77898257c0f6d7</id>
<content type='text'>
pmp_get() may return an error if the given entry, given by the caller
of is_pmp_entry_mapped(), is invalid. This results in the output
parameters for pmp_get() being uninitialized. To avoid using garbage
values, check the result and return early if necessary.

This issue is not being hit because at the moment
is_pmp_entry_mapped() is only being called from a single site with a
valid hardcoded value.

Signed-off-by: Carlos López &lt;carlos.lopezr4096@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add support for smcntrpmf</title>
<updated>2023-08-18T09:20:38Z</updated>
<author>
<name>Kaiwen Xue</name>
<email>kaiwenx@rivosinc.com</email>
</author>
<published>2023-07-20T21:07:02Z</published>
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<id>urn:sha1:c104c60912a4ed26093f00a9675ad0286e8dcd29</id>
<content type='text'>
This adds the support for ISA extension smcntrpmf. When some inhibit flags
are set by a lower privilege mode for new CSRs added by smcntrpmf, OpenSBI
sets the appropriate values correspondingly.

Signed-off-by: Kaiwen Xue &lt;kaiwenx@andrew.cmu.edu&gt;
Signed-off-by: Kaiwen Xue &lt;kaiwenx@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
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