<feed xmlns='http://www.w3.org/2005/Atom'>
<title>opensbi.git/lib/sbi/riscv_asm.c, branch v1.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/sbi/riscv_asm.c?h=v1.2</id>
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<updated>2022-05-07T04:32:28Z</updated>
<entry>
<title>lib: sbi: Remove 's' and 'u' from misa_string() output</title>
<updated>2022-05-07T04:32:28Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2022-04-28T12:20:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=5a6be99cc53b80ff1691e127d6dfbdd7ec4e9e45'/>
<id>urn:sha1:5a6be99cc53b80ff1691e127d6dfbdd7ec4e9e45</id>
<content type='text'>
Both 's' and 'u' are not treated as ISA extensions since these are
privilege modes so let's remove it from misa_string() output.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Fix mhpmeventh access for rv32 in absence of sscofpmf</title>
<updated>2022-05-07T04:10:59Z</updated>
<author>
<name>Atish Patra</name>
<email>atishp@rivosinc.com</email>
</author>
<published>2022-04-28T18:48:29Z</published>
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<id>urn:sha1:b0c9df514bdb29a0c90c9868f4209f2ac7a6d567</id>
<content type='text'>
MHPMEVENT3H-31H are defined in sscofpmf extension. Thus, they should be
accessed only if sscofpmf is present.

Signed-off-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: pmp_set/pmp_get moved errors from runtime to compile time</title>
<updated>2022-03-27T03:22:19Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2022-03-15T16:22:38Z</published>
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<id>urn:sha1:2dfbd3c0e226c21b978e0a5a1c58893ee6679d15</id>
<content type='text'>
pmp_set/pmp_get calculates the location of the CSR register separately
through conditional compilation. In the case of non-32-bit and 64-bit,
we can report an error directly through #error without putting it at
runtime

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: simplify pmp_set(), pmp_get()</title>
<updated>2021-12-22T03:35:05Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2021-12-17T17:02:58Z</published>
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<id>urn:sha1:2082153fc90c54b98647b1fbaeb7511fd57b7d2b</id>
<content type='text'>
pmpcfg_csr and pmpcfg_shift are only negative for an unexpected value of
__riscv_xlen. We can immediately return in this case.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Dong Du &lt;Dd_nirvana@sjtu.edu.cn&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Improve fatal error handling</title>
<updated>2021-12-02T03:20:36Z</updated>
<author>
<name>Jessica Clarke</name>
<email>jrtc27@jrtc27.com</email>
</author>
<published>2021-11-21T17:30:22Z</published>
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<id>urn:sha1:14faee6916bc973b9fdb816c5f4a45096e3f645a</id>
<content type='text'>
BUG and BUG_ON are not informative and are rather lazy interfaces, only
telling the user that something went wrong in a given function, but not
what, requiring the user to find the sources corresponding to their
firmware (which may not be available) and figure out how that BUG(_ON)
was hit. Even SBI_ASSERT in its current form, which does include the
condition that triggered it in the output, isn't necessarily very
informative. In some cases, the error may be fixable by the user, but
they need to know the problem in order to have any hope of fixing it.
It's also a nuisance for developers, whose development trees may have
changed significantly since the release in question being used, and so
line numbers can make it harder for them to understand which error case
a user has hit.

This patch introduces a new sbi_panic function which is printf-like,
allowing detailed error messages to be printed to the console. BUG and
BUG_ON are removed, since the former is just a worse form of sbi_panic
and the latter is a worse version of SBI_ASSERT. Finally, SBI_ASSERT is
augmented to take a set of arguments to pass to sbi_panic on failure,
used like so (sbi_boot_print_hart's current error case, which currently
manually calls sbi_printf and sbi_hart_hang):

  SBI_ASSERT(xlen &gt;= 1, ("Error %d getting MISA XLEN\n", xlen));

The existing users of BUG are replaced with calls to sbi_panic along
with informative error messages. BUG_ON and SBI_ASSERT were unused (and,
in the case of SBI_ASSERT, remain unused).

Many existing users of sbi_hart_hang should be converted to use either
sbi_panic or SBI_ASSERT after this commit.

Signed-off-by: Jessica Clarke &lt;jrtc27@jrtc27.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: clear pmpcfg.A before setting in pmp_set()</title>
<updated>2021-11-12T06:49:00Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2021-11-08T09:43:03Z</published>
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<id>urn:sha1:d335a178d8cfdf2ed13af70fe385f7e38162e171</id>
<content type='text'>
We should clear A bits in prot variable before enabling A_NA4 or A_NAPOT.

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Update csr_read/write_num for PMU</title>
<updated>2021-11-11T12:09:38Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2021-11-08T18:52:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=7084ad9f4281eecd7a7f66cecfd7d9cff8d452ad'/>
<id>urn:sha1:7084ad9f4281eecd7a7f66cecfd7d9cff8d452ad</id>
<content type='text'>
The Sscofpmf extension introduces mhpmevent[h] csrs to handle filtering
/overflow bits in RV32. There is no way to read/write mcountinhibit
using mcountinhibit csr using a variable.

Updated the support to read/write mhpmevent[h] and mcountinhibit csr.

Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add BUG() macro for csr_read/write_num() and misa_string()</title>
<updated>2021-09-22T08:08:39Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2021-09-16T04:32:50Z</published>
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<id>urn:sha1:51113fe2a5ac6b5a712f2e5393347bf24194c09b</id>
<content type='text'>
We use BUG() macro in csr_read_num(), csr_write_num(), and
misa_string() functions for unhandled cases.

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: fix ctz bug</title>
<updated>2021-09-22T07:56:23Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2021-09-15T06:50:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=3477f08b08da6bfd904218fdb76b3db592dd7ebd'/>
<id>urn:sha1:3477f08b08da6bfd904218fdb76b3db592dd7ebd</id>
<content type='text'>
The original version of ctz will cause an endless loop, if the parameter
passed in is 0. This commit fixes this bug.

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Use csr_read/write_num to read/update PMU counters</title>
<updated>2021-07-11T04:50:44Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2021-07-10T16:18:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=49966db30658a3d5070e1a10200bd8c73dab0851'/>
<id>urn:sha1:49966db30658a3d5070e1a10200bd8c73dab0851</id>
<content type='text'>
Currently, csr_read/write_num functions are used to read/write PMP related
CSRs where CSR value is decided at runtime. Expand this function to include
PMU related CSRs as well.

Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
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