opensbi.git/lib/sbi/sbi_timer.c, branch v1.8

lib: sbi: hart: Detect existence of cycle and instret CSRs for Zicntr

2025-05-20T07:55:53Z

Zicntr extension specifies three read-only CSRs, time, cycle and instret. It isn't sufficient to report Zicntr is fully supported with only time CSR detected. This patch introduces a bitmap to sbi_hart_features to record availability of these CSRs, which are detected using traps. Zicntr is reported as present if and only if three CSRs are all available on the HARTs. Sites originally depending on SBI_HART_EXT_ZICNTR for detecting existence of time CSR are switched to detect SBI_HART_CSR_TIME instead. Suggested-by: Anup Patel Signed-off-by: Yao Zi Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250516133352.36617-3-ziyao@disroot.org Signed-off-by: Anup Patel

lib: sbi: use 64 bit csr macros

2025-04-30T04:44:25Z

Switch the most obvious cases to new macros. Reviewed-by: Anup Patel Signed-off-by: Radim Krčmář Link: https://lore.kernel.org/r/20250429142549.3673976-4-rkrcmar@ventanamicro.com Signed-off-by: Anup Patel

platform: Drop timer warm init and exit hooks

2024-11-05T12:09:31Z

Now that driver lifecycle is managed from within the SBI timer core, platforms need only to initialize the driver once during cold init. Remove the remaining platform hooks that are no longer used. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi_timer: Call driver warm_init from SBI core

2024-11-05T11:59:13Z

Currently, the platform's timer device is tracked in two places: the core SBI implementation has `timer_dev`, and the FDT timer layer has `current_driver`. The latter is used for warm initialization of the timer device. However, this warm init is not specific to FDT-based platforms; other platforms call exactly the same functions from the same point in the boot sequence. The code is simplified and made common across platforms by treating warm init and exit as properties of the driver, not the platform. Then the platform's only role is to select and prepare a driver during cold boot. For now, only add a .warm_init hook, since none of the existing drivers need an .exit hook. It could be added in the future if needed. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi: Fix writes to emulated 32-bit htimedelta CSR

2024-09-20T16:22:06Z

Writes to the low half CSR should not affect the high half of the value. Make this separation explicit by writing to the delta in memory as two adjacent XLEN-sized values. Fixes: 1e9f88889f8b ("lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR") Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi: Add Zicntr as a HART ISA extension

2023-07-09T05:36:24Z

Recently ratified Zicntr ISA extension covers cycle, time and instret CSRs so we replace the "time" ISA extension with "zicntr" ISA extension in OpenSBI. Signed-off-by: Anup Patel Reviewed-by: Xiang W

lib: sbi_timer: Added a conditional wait function which can timeout

2022-07-08T09:21:24Z

Motivation: Suppose a peripheral needs to be configured to transmit data. There is an SFR bit which indicates that the peripheral is ready to transmit. The firmware should check the bit and will only transmit data when the peripheral is ready. When the firmware starts polling the SFR, the peripheral could be busy transmitting/receiving other data so the firmware must wait till that completes. Assuming that there is no other way, the firmware shouldn't wait indefinitely. The function sbi_timer_waitms_until() will constantly check whether a certain condition is satisfied, or timeout occurs. It can be used for the cases when a timeout is required. Signed-off-by: Adnan Rahman Chowdhury Reviewed-by: Xiang W Reviewed-by: Anup Patel

lib: sbi_timer: Drop unnecessary get_platform_ticks wrapper

2022-05-30T05:13:03Z

The device's timer_value callback is already the right prototype to use for the get_time_val function pointer. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi: Convert hart features into hart extensions

2022-05-07T04:46:30Z

Since past few years, we have been using "hart features" in OpenSBI to represent all optionalities and multi-letter extensions defined by the RISC-V specifications. The RISC-V profiles specification has taken a different approach and started assigning extension names for all optionalities which did not have any extension name previously. (Refer, https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc) Inspired from the RISC-V profiles specification, we convert OpenSBI hart features into hart extensions. Going forward, we align the extension naming with RISC-V profiles specification. Currently, only "time CSR" and "AIA CSR" have not been assigned extension name but for everything else we have a name. Signed-off-by: Anup Patel Reviewed-by: Atish Patra

lib: sbi: Implement Sstc extension

2022-04-28T06:15:21Z

Recently, Sstc extension was ratified. It defines stimecmp which allows the supervisor mode to directly update the timecmp value without the need of the SBI call. The hardware also can inject the S-mode timer interrupt direclty to the supervisor without going through the M-mode. To maintain backward compatibility with the older software, SBI call now uses stimecmp directly if the hardware supports. Implement the Sstc extension. Signed-off-by: Atish Patra Reviewed-by: Anup Patel