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<title>opensbi.git/lib/sbi, branch v0.6</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/sbi?h=v0.6</id>
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<updated>2020-02-24T03:40:04Z</updated>
<entry>
<title>lib: Simplify the for-loop in sbi_ipi_send_many()</title>
<updated>2020-02-24T03:40:04Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-02-22T06:20:55Z</published>
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<id>urn:sha1:f8b3bb826d488847009f74409b1898d88b5a6cc7</id>
<content type='text'>
We don't need to separately call sbi_ipi_send() for current HART
in sbi_ipi_send_many(). Instead, we can simplify the for-loop in
sbi_ipi_send_many() and call sbi_ipi_send() for all HARTs in the
for-loop itself.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>lib: Use available hart mask for correct hbase value</title>
<updated>2020-02-22T04:36:51Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-02-21T23:47:54Z</published>
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<id>urn:sha1:393624377a45d0fc20a376db60fb136a3b1fd685</id>
<content type='text'>
As per the latest SBI specification, all online harts should receive
IPI if hbase is set to -1.

Set the target mask to all available hart mask if hbase is -1.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Fix typo in atomic exchange functions</title>
<updated>2020-02-22T04:34:38Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-02-21T23:47:53Z</published>
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<id>urn:sha1:c3b3b8f43b49e4fa8fde5e916cd8d573687e3626</id>
<content type='text'>
There is a typo in atomic operations code which prevents the
usage of riscv atomic instructions even if it is supported.

Fix the typo.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Print interrupt and exception delegation in boot prints</title>
<updated>2020-02-19T04:28:48Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-02-18T06:23:52Z</published>
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<id>urn:sha1:24c3082ea496d39d406601ee4243b724f4d31aec</id>
<content type='text'>
We print MIDELEG and MEDELEG CSRs as part of boot prints so that
boot log shows the interrupts and exceptions delegated to S-mode.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Don't check MIDELEG and MEDELEG at end of delegate_traps()</title>
<updated>2020-02-19T04:28:45Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-02-18T06:07:16Z</published>
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<id>urn:sha1:bc874e34cecbd1e024ae7be4ec2f34d9cb1fbecb</id>
<content type='text'>
The MIDELEG and MEDELEG CSR checks at end of delegate_traps() were
added for initial bring-up on SiFive Unleashed and QEMU. These
checks are not required any more and in-future these checks can
cause failures because some of the MIDELEG/MEDELEG bits will be
hard-wired to 0 or 1.

For related discussion, refer github issue:
https://github.com/riscv/opensbi/issues/157

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>Revert "lib: Use __builtin_ctzl() in pmp_get()"</title>
<updated>2020-02-18T03:58:33Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-02-18T03:56:33Z</published>
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<id>urn:sha1:0b414532c41303ce42fa2b9cc4861c5b01e76b40</id>
<content type='text'>
This reverts commit 897b8fbdd92fcfad194417d348b8dad16ab0e17a.

We are seeing compile errors using newlib based GCC cross-toolchain
so we restore back old ctz() implementation.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Initialize out value in SBI calls</title>
<updated>2020-02-13T04:27:22Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-02-12T01:39:45Z</published>
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<id>urn:sha1:1a8ca08cc037c65c605e7e2f98b8c01606eaca3b</id>
<content type='text'>
As per the SBI specification, the return value in sbiret is undefined
if not explicitly described in the function. However, supervisor may
check this value by mistake and get a garbage value.

Initialize it to zero to avoid nasty supervisor bugs.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Use __builtin_ctzl() in pmp_get()</title>
<updated>2020-02-13T03:40:57Z</updated>
<author>
<name>Li Jinpei</name>
<email>leekingp1994@163.com</email>
</author>
<published>2020-02-11T10:07:24Z</published>
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<id>urn:sha1:897b8fbdd92fcfad194417d348b8dad16ab0e17a</id>
<content type='text'>
We should should __builtin_ctzl() in pmp_get() instead of
custom ctz() function.

Signed-off-by: Li Jinpei &lt;leekingp1994@163.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi_scratch: use bitwise ops in sbi_scratch_alloc_offset()</title>
<updated>2020-02-13T03:40:55Z</updated>
<author>
<name>Li Jinpei</name>
<email>leekingp1994@163.com</email>
</author>
<published>2020-02-11T09:57:49Z</published>
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<id>urn:sha1:179eddeb9ca5fc1869d40696e0d4cd9899b9d92d</id>
<content type='text'>
Instead of using loop to make "size" machine word aligned, we should
use bitwise ops.

Signed-off-by: Li Jinpei &lt;leekingp1994@163.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Factor-out SBI base extension</title>
<updated>2020-01-22T06:43:47Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-01-17T13:55:24Z</published>
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<id>urn:sha1:021b9e7c767f101e80fdd4868ad95177fa1cf1da</id>
<content type='text'>
This patch factor-out SBI base extension into its own source
for better modularity of SBI implementation.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
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