opensbi.git/lib/sbi, branch v1.1

lib: pmu: allow to use the highest available counter

2022-06-25T03:14:20Z

OpenSBI explicitly assumes that there is no pmu hardware counter with index 1: hardware uses that bit for TM control. So OpenSBI filters out that index in sanity checks. However OpenSBI also excludes that counter when reports total amount of hardware counters to Linux. As a result, Linux uses incomplete counters mask excluding the highest available counter. Return accurate number of counters, update the firmware counter starting index, fix range checks that include num_hw_ctrs. The simple test is to make sure that there is no counter multiplexing in the following command: $ perf stat -e \ r8000000000000000,r8000000000000001,r8000000000000002,r8000000000000003, \ r8000000000000004,r8000000000000005,r8000000000000006,r8000000000000007, \ r8000000000000008,r8000000000000009,r800000000000000a,r800000000000000b, \ r800000000000000c,r800000000000000d,r800000000000000e,r800000000000000f \ ls Note that 16 firmware events with 16 counters won't require multiplexing. Signed-off-by: Sergey Matyukevich Signed-off-by: Atish Patra Reviewed-by: Atish Patra

lib: sbi: Fix tval and tinst for sbi_get_insn()

2022-06-21T03:01:56Z

We should not change trap->tval to mepc because mtval already points to the faulting portion of the emulated instruction fetch, which is also what stval is expected to be. In addition, htinst is only allowed to be zero for instruction access faults or page faults, and is only allowed to be zero or a psuedoinstruction for instruction guest-page faults. Fix trap->tinst for these cases. Signed-off-by: dramforever Reviewed-by: Anup Patel

lib: sbi: Fixup tinst for exceptions in sbi_misaligned_*()

2022-06-21T03:01:14Z

If there is an exception while emulating a misaligned load/store, fixup uptrap.tinst before redirecting. Otherwise, HS-mode software may receive an htinst describing the lbu/sb instruction that faulted during emulation[1]. [1]: https://github.com/riscv-software-src/opensbi/issues/258 Signed-off-by: dramforever Reviewed-by: Anup Patel

lib: sbi_hsm: Assume a consistent resume address

2022-06-13T06:24:06Z

The suspend code needs to know the resume address for two reasons: 1) Programming some hardware register or management firmware. Here we assume the hardware/firmware maintains its state between suspends, so it only needs to be programmed once at startup. 2) When a non-retentive suspend request ends up being retentive, due to lack of hardware support, pending interrupt, or for some other reason. However, the behavior here is not platform-dependent, and this can be handled in the generic hart suspend function. Since neither situation requires the platform-level suspend function to know the resume address, stop passing it to that function. Instead, handle the non-retentive to retentive situation generically. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: sbi_hsm: Call a device hook during hart resume

2022-06-13T06:24:06Z

Non-retentive suspend states may require platform-specific actions during resume. For example, firmware may need to save and restore the values of custom CSRs. Add a hook to support this. Reviewed-by: Anup Patel Signed-off-by: Samuel Holland

lib: sbi_trap: Redirect exception based on hedeleg

2022-06-13T05:32:49Z

HS-mode software can choose what exceptions to delegate to VS-mode using the hedeleg CSR. Synthetic VS/VU-mode exceptions should also honor hedeleg. They should be redirected to VS-mode if and only if delegated by HS-mode. Signed-off-by: dramforever Reviewed-by: Xiang W Reviewed-by: Anup Patel

lib: sbi_illegal_insn: Add emulation for fence.tso

2022-06-01T11:50:20Z

While OpenC906 appears to properly decode `fence.tso` as a fence instruction[1], the version of the C906 taped out in the Allwinner D1 does not, and raises illegal instruction. Handle this errata by emulating `fence.tso` as `fence rw, rw`. [1]: https://github.com/T-head-Semi/openc906/blob/30827e7f/C906_RTL_FACTORY/gen_rtl/idu/rtl/aq_idu_id_decd.v#L2097 Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi_illegal_insn: Constify illegal_insn_table

2022-05-30T05:24:31Z

This table does not need to be modified at runtime. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi_timer: Drop unnecessary get_platform_ticks wrapper

2022-05-30T05:13:03Z

The device's timer_value callback is already the right prototype to use for the get_time_val function pointer. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: sbi: fix system_opcode_insn

2022-05-30T04:52:13Z

If the csr's operation comes from M mode, it should not be forwarded to low-privilege processing, this patch fixes this problem. Signed-off-by: Xiang W Reviewed-by: Anup Patel