opensbi.git/lib/sbi, branch v1.5

lib: sbi: check incoming dbtr shmem address

2024-06-28T03:06:46Z

Current Debug Trigger SBI extension proposal suggests to activate shmem area and obtain its physical address from S-mode software in the following way: : If both `shmem_phys_lo` and `shmem_phys_hi` parameters are not : all-ones bitwise then `shmem_phys_lo` specifies the lower XLEN : bits and `shmem_phys_hi` specifies the upper XLEN bits of the : shared memory physical base address. The `shmem_phys_lo` MUST : be `(XLEN / 8)` byte aligned and the size of shared memory is : assumed to be `trig_max * (XLEN / 2)` bytes. For more details see the current version of the proposal: - https://lists.riscv.org/g/tech-debug/message/1302 On the other hand, on RV32, the M-mode can only access the first 4GB of the physical address space because M-mode does not have MMU to access full 34-bit physical address space. Similarly, on RV64, the M-mode can only access memory addressed by 64 bits. This commit checks shmem address in function sbi_dbtr_setup_shmem to make sure that shmem_phys_hi part of the valid address is zero. Besides, the macro DBTR_SHMEM_MAKE_PHYS is updated to take into account only low XLEN part. Signed-off-by: Sergey Matyukevich Reviewed-by: Himanshu Chauhan

lib: sbi: fwft: return SBI_EINVAL rather than SBI_ERR_INVALID_PARAM

2024-06-26T12:44:49Z

Error code returned by the ecall handles should use the defines from sbi_ecall_interface.h rather than sbi_error.h. Signed-off-by: Clément Léger Reviewed-by: Andrew Jones Reviewed-by: Anup Patel

lib: sbi: fwft: check feature value to be exactly 1 or 0

2024-06-26T12:43:54Z

As stated by the spec and pointed out by Andrew Jones, the value passed for MISALIGNED_EXC_DELEG and PTE_AD_HW_UPDATING should be either 0 or 1. Add check for these values and return SBI_EINVAL if not. Signed-off-by: Clément Léger Reviewed-by: Andrew Jones Reviewed-by: Anup Patel

lib: sbi: implement SBI FWFT extension

2024-06-19T12:45:28Z

The SBI FWFT extension defines a set of function that can be called to control the configuration of some platform features (misaligned trap delegation, etc). This patch implements sbi_fwft_set() and sbi_fwft_get() as defined in the specification [1]. Link: https://lists.riscv.org/g/tech-prs/message/924 [1] Signed-off-by: Clément Léger Reviewed-by: Anup Patel

lib: sbi: fwft: add support for SBI_FWFT_PTE_AD_HW_UPDATING

2024-06-19T12:41:26Z

Add support for SBI_FWFT_PTE_AD_HW_UPDATING based on SVADU presence. Signed-off-by: Clément Léger Reviewed-by: Anup Patel

lib: sbi: fwft: add support for SBI_FWFT_MISALIGNED_EXC_DELEG

2024-06-19T12:40:36Z

Add support for SBI_FWFT_MISALIGNED_EXC_DELEG withing FWFT support. This support allows to delegate misaligned accesses traps. Signed-off-by: Clément Léger Reviewed-by: Anup Patel

lib: sbi: add support for firmware features extension

2024-06-19T12:39:22Z

This extension allows the software running in supervisor mode to control the behavior of various features of the SBI [1]. Implement the support for such extension. Link: https://lists.riscv.org/g/tech-prs/message/924 [1] Signed-off-by: Clément Léger Reviewed-by: Anup Patel

lib: sbi: Add support for Svade and Svadu extensions

2024-06-18T11:11:32Z

Add support for Svade and Svadu extensions. When both are present in the device tree, the M-mode firmware should select the Svade extension to comply with the RVA23 profile, which mandates Svade and lists Svadu as an optional extension. Signed-off-by: Yong-Xuan Wang Reviewed-by: Anup Patel

sbi: sbi_domain_context: Fix trap context for domain context switching

2024-06-13T13:51:27Z

Save/restore sbi_trap_context during domain context switching to ensure proper trap handling and isolation. This maintains correct domain-specific state, avoiding context corruption. Fixes: abea949721bc ("lib: sbi: Introduce trap context") Signed-off-by: Yu Chien Peter Lin Reviewed-by: Alvin Chang Tested-by: Alvin Chang Reviewed-by: Yong Li Tested-by: Yong Li

lib: sbi: sse: handle missing writable attributes

2024-05-23T05:23:02Z

The spec states that a6, a7, flags and sepc are writable but the implementation was not allowing that. Add support for these 4 writable attributes. Signed-off-by: Clément Léger Reviewed-by: Samuel Holland Reviewed-by: Anup Patel