opensbi.git/lib/sbi, branch v1.7

lib: sbi_platform: Add platform specific pmp_set() and pmp_disable()

2025-06-17T04:04:01Z

Allow platforms to implement platform specific PMP setup and PMP disable functions which are called before actual PMP CSRs are configured. Also, implement pmp_set() and pmp_disable() for MIPS P8700. Signed-off-by: Chao-ying Fu Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250614172756.153902-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: dbtr: Fix update_triggers to match SBI

2025-06-16T11:31:52Z

OpenSBI implements sbi_dbtr_update_trig as `sbi_dbtr_update_trig(unsigned long trig_idx_base, unsigned long trig_idx_mask)` yet SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] declares it as `sbi_debug_update_triggers(unsigned long trig_count)` Change update_triggers to match SBI. [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support") Signed-off-by: Jesse Taube Reviewed-by: Himanshu Chauhan Tested-by: Charlie Jenkins Reviewed-by: Charlie Jenkins Link: https://lore.kernel.org/r/20250528154604.571815-1-jesse@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: Optimize saddr mapping in sbi_dbtr.c

2025-06-16T11:23:50Z

The original implementation mapped saddr individually for each entry. The updated code now maps saddr for all entries in a single operation. This change reduces the number of PMP (Physical Memory Protection) operations, improving efficiency and performance. Tested-by: Himanshu Chauhan Reviewed-by: Himanshu Chauhan Signed-off-by: Xiang W Link: https://lore.kernel.org/r/20250514052422.575551-1-wxjstz@126.com Signed-off-by: Anup Patel

lib: sbi: dbtr: Fix shared memory layout

2025-06-16T04:44:20Z

The existing sbi_dbtr_shmem_entry has a size of 5 * XLEN with the final entry being idx. This is in contrast to the SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] where idx and trig_state share the same offset (0) in shared memory, with a total size of 4 * XLEN for all the SBI calls. Replace struct with union to match memory layout described in SBI. [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support") Signed-off-by: Jesse Taube Reviewed-by: Charlie Jenkins Tested-by: Charlie Jenkins Reviewed-by: Himanshu Chauhan Tested-by: Himanshu Chauhan Link: https://lore.kernel.org/r/20250604135225.842241-1-jesse@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: Revert entry_count before doing hsm stop in hsm wait loop

2025-06-16T04:10:28Z

Using hsm stop in hsm wait loop causes secondary harts to be stuck forever in OpenSBI on RISC-V platforms where HSM hart hotplug is available and all harts come-up at the same time during system power-on. For example, lets say we have two harts A and B on a RISC-V platform with HSM hart hotplug which come-up at the same time during system power-on. The hart A enters OpenSBI before hart B hence it becomes the primary (or cold-boot) hart whereas hart B becomes the secondary (or warm-boot) hart. The hart A follows the OpenSBI cold-boot path and registers hsm device before hart B enters OpenSBI. The hart B eventually enters OpenSBI and follows the OpenSBI warm-boot path so it will increment it's own entry_count before entering hsm wait loop where it sees hsm device and stops itself. Later as part of the Linux boot-up sequence, hart A issues SBI HSM start call to bring-up hart B but OpenSBI sees entry_count != init_count for hart B in sbi_hsm_hart_start() hence hsm_device_hart_start() is not called for hart B resulting in hart B stuck forever in OpenSBI. To fix the above issue, revert entry_count before doing hsm stop in hsm wait loop. Fixes: d844deadec94 ("lib: sbi: Use hsm stop for hsm wait") Signed-off-by: Anup Patel Reviewed-by: Nick Hu Link: https://lore.kernel.org/r/20250527124821.2113467-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: sbi: fwft: Use only the provided PMLEN value

2025-06-15T13:26:33Z

As of riscv-sbi-doc commit c7d3d1f7dcaa ("ext-fwft: use the provided value in fwft_set(POINTER_MASKING_PMLEN)"), the SBI implementation must use only the provided PMLEN value or else fail. It may not fall back to a larger PMLEN value. Signed-off-by: Samuel Holland Reviewed-by: Radim Krčmář Link: https://lore.kernel.org/r/20250522013503.2556053-1-samuel.holland@sifive.com Signed-off-by: Anup Patel

lib: sbi: pmu: Remove MIP clearing from pmu_sse_enable()

2025-06-15T13:14:51Z

Clearing MIP at that point means that we can probably lose a pending interrupt. This should not happen, remove MIP clearing from there. Signed-off-by: Clément Léger Reviewed-by: Atish Patra Reviewed-by: Samuel Holland Link: https://lore.kernel.org/r/20250519083950.739044-3-cleger@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: pmu: Add SSE register/unregister() callbacks

2025-06-15T13:14:51Z

As soon as the SSE event is registered, there is no reason not to delegate the interrupt. Split the PMU SSE enable/disable() callbacks by moving MIDELEG setting to register/unregister(). Signed-off-by: Clément Léger Reviewed-by: Atish Patra Reviewed-by: Samuel Holland Link: https://lore.kernel.org/r/20250519083950.739044-2-cleger@rivosinc.com Signed-off-by: Anup Patel

lib: sbi: pmu: Return SBI_EINVAL if cidx_mask is 0

2025-05-20T15:31:14Z

Currently, when configuring a matching programmable HPM counter with Sscofpmf being present, cidx_base > 2, and cidx_mask == 0 to monitor either the CPU_CYCLES or INSTRUCTIONS hardware event, sbi_pmu_ctr_cfg_match will succeed but it will configure the corresponding fixed counter instead of the counter specified by the cidx_base parameter. During counter configuration, the following issues may arise: - If the SKIP_MATCH flag is set, an out-of-bounds memory read of the phs->active_events array would occur, which could lead to undefined behavior. - If the CLEAR_VALUE flag is set, the corresponding fixed counter will be reset, which could be considered unexpected behavior. - If the AUTO_START flag is set, pmu_ctr_start_hw will silently start the fixed counter, even though it has already started. From the supervisor's perspective, nothing has changed, which could be confusing. The supervisor will not see the SBI_ERR_ALREADY_STARTED error code since sbi_pmu_ctr_cfg_match does not return the error code of pmu_ctr_start_hw. The only way to detect these issues is to check the ctr_idx return value of sbi_pmu_ctr_cfg_match and compare it with cidx_base. Fix these issues by returning the SBI_ERR_INVALID_PARAM error code if the cidx_mask parameter value being passed in is 0 since an invalid parameter should not lead to a successful sbi_pmu_ctr_cfg_match but with unexpected side effects. Following a similar rationale, add the validation check to sbi_pmu_ctr_start and sbi_pmu_ctr_stop as well since sbi_fls is undefined when the mask is 0. This also aligns OpenSBI's behavior with KVM's. Signed-off-by: James Raphael Tiovalen Reviewed-by: Atish Patra Reviewed-by: Andrew Jones Link: https://lore.kernel.org/r/20250520132533.30974-1-jamestiotio@gmail.com Signed-off-by: Anup Patel

include: sbi: Change SBI spec version to 3.0

2025-05-20T08:17:34Z

Now that SBI v3.0 specification is frozen, change runtime SBI version implemented by OpenSBI to v3.0. Also, mark extensions defined by the SBI v3.0 specification as non-experimental. Signed-off-by: Anup Patel Reviewed-by: Clément Léger Reviewed-by: Atish Patra Link: https://lore.kernel.org/r/20250516122844.113423-1-apatel@ventanamicro.com Signed-off-by: Anup Patel