<feed xmlns='http://www.w3.org/2005/Atom'>
<title>opensbi.git/lib/sbi_hart.c, branch v0.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/sbi_hart.c?h=v0.2</id>
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<updated>2019-02-14T04:01:18Z</updated>
<entry>
<title>lib: Use CSR_&lt;FOO&gt; instead of &lt;foo&gt; for csr_*()</title>
<updated>2019-02-14T04:01:18Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-02-13T02:32:06Z</published>
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<id>urn:sha1:70a474d2c24dc3e0c8841e6ef5cc96797deadbf5</id>
<content type='text'>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.

Suggested-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>all: Update copyright header in all files</title>
<updated>2019-01-24T08:37:47Z</updated>
<author>
<name>Anup patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-01-24T06:11:10Z</published>
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<id>urn:sha1:20990ee0abaf286917b6e2aae992d4183ff695f6</id>
<content type='text'>
This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Rename ipi_inject() to ipi_send() for sbi_platform</title>
<updated>2019-01-23T03:09:26Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-01-23T02:43:29Z</published>
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<id>urn:sha1:025d0ae994e5663e8c2ca0e16c42e814abac027d</id>
<content type='text'>
For better naming, we rename ipi_inject() to ipi_send() in
struct sbi_platform. We also replace term "inject" with
"send" in all related places.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Remove source_hart and hartid parameter from IPI callbacks</title>
<updated>2019-01-23T03:09:26Z</updated>
<author>
<name>Anup patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-01-22T08:50:59Z</published>
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<id>urn:sha1:18ec89e46e3cf8011b30deded6ea8d77720bdb3c</id>
<content type='text'>
The source_hart and hartid parameter is really not required in
IPI callbacks of sbi_platform because current hartid can always
be obtained by calling sbi_current_hartid() API.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Do not access mi/edeleg register if S mode is not present.</title>
<updated>2019-01-22T04:33:49Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-01-22T02:17:45Z</published>
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<id>urn:sha1:023aa6bb043420cd215379a0b31b8aceef38807b</id>
<content type='text'>
As per the RISC-V ISA, mideleg and medeleg registers should not exist
if S-mode is not present for a hart.

We shouldn't access these CSRs if non S-mode harts.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Move software interrupt enablement from firmware to lib</title>
<updated>2019-01-22T04:33:49Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-01-18T21:35:47Z</published>
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<id>urn:sha1:784a4657c0957e7f9561fd2d87930ba008643c1e</id>
<content type='text'>
The secondary hart waits for an IPI signal from the boot hart to
executing boot code (hot boot). As a result, software generated
interrupts have to be enabled for secondary harts before waiting for
the boot hart boot completion IPI signal.

Enabling software generated interrupts (IPI) can be done independently
of the firmware code and moved to libsbi code so that the different
firmware do not have to implement this.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Add hard FP access macros and defines</title>
<updated>2019-01-03T22:21:08Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-01-03T05:07:43Z</published>
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<id>urn:sha1:4d1eccc41d96413fae25cea5f941f7860429340b</id>
<content type='text'>
This patch adds hardware floating-point (hard FP) access
macros and defines.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>Introduce hart disabled parameter in platform.</title>
<updated>2018-12-22T06:11:21Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2018-12-21T19:29:28Z</published>
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<id>urn:sha1:88b173b33b0810fbeff91ee589073efb9099a904</id>
<content type='text'>
As of now, uboot doesn't have support for SMP.
Moreover, unleashed board has a E51 hart which
doesn't not support S mode.

We should only boot only 1 non-zero hart.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>Introduce HAS_MFAULTS_DELEGATION feature</title>
<updated>2018-12-21T11:02:30Z</updated>
<author>
<name>Damien Le Moal</name>
<email>damien.lemoal@wdc.com</email>
</author>
<published>2018-12-21T10:19:54Z</published>
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<id>urn:sha1:27332e63faaf6d3220a9d56bcfb280921114f012</id>
<content type='text'>
Conditionnally delegate page fault exceptions from M mode to S mode
based on the platform features.

Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Remove prints from sbi_hart_switch_mode()</title>
<updated>2018-12-21T09:24:06Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2018-12-21T08:42:10Z</published>
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<id>urn:sha1:a18913200a34c6da44c634578214db7830cdd036</id>
<content type='text'>
The sbi_hart_switch_mode() will be used by CPU hotplug. This means
if we have prints in sbi_hart_switch_mode() then these prints will
mix with Linux prints.

Being a runtime firmware, we should be verbose only at coldboot
time and error situations.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
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