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<title>opensbi.git/lib/sbi_misaligned_ldst.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/sbi_misaligned_ldst.c?h=master</id>
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<updated>2019-06-19T04:18:51Z</updated>
<entry>
<title>lib: Move sbi core library to lib/sbi</title>
<updated>2019-06-19T04:18:51Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-06-18T21:54:01Z</published>
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<id>urn:sha1:749b0b093242a4c27f7c4f66121afd7852b2de48</id>
<content type='text'>
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Acked-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Handle page/access fault caused by unpriv load/store</title>
<updated>2019-05-24T02:52:47Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-05-23T08:00:58Z</published>
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<id>urn:sha1:a6395acd6cb2c35871481d3e4f0beaf449f8c0fd</id>
<content type='text'>
The unpriv load/store instruction from M-mode can cause page/access
fault to M-mode if S-mode page table did not have mappings OR it did
not have PMP access permission.

To tackle this, we redirect trap back to S-mode if unpriv load/store
instruction traps in M-mode.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>all: run clang-format and update checked-in files</title>
<updated>2019-04-24T04:19:46Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2019-04-11T00:41:52Z</published>
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<id>urn:sha1:10baa64c02f6746fd506136e0693aa2d592574fb</id>
<content type='text'>
Noisy commit, no functional changes.

Generated with an current upstream clang-format and:

clang-format -i $(find . -name \*.[ch])

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>include: Make mstatus parameter optional for get_insn()</title>
<updated>2019-04-01T04:40:38Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-03-30T13:13:49Z</published>
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<id>urn:sha1:78c87cd13a75c167a693b173e6e2e0e44ad57328</id>
<content type='text'>
The mstatus parameter of get_insn() is used to return MSTATUS CSR
value which get_insn() saw. Most of the get_insn() callers don't
use the value returned in mstatus so this patch makes mstatus
parameter optional for get_insn().

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Rename sbi_unpriv.h to riscv_unpriv.h</title>
<updated>2019-04-01T04:40:38Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-03-30T12:13:23Z</published>
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<id>urn:sha1:13877c3a6752138018f99214273dc3d7376cf5eb</id>
<content type='text'>
The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Remove unused mepc arg from load_xyz() and store_xyz() functions</title>
<updated>2019-04-01T04:40:38Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-03-30T12:05:48Z</published>
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<id>urn:sha1:cfff0126ab80d8c53e55f6eaae1a59e08159160b</id>
<content type='text'>
This patch removes unused mepc arg from load_xyz() and store_xyz()
unpriviledge access functions.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Use CSR_&lt;FOO&gt; instead of &lt;foo&gt; for csr_*()</title>
<updated>2019-02-14T04:01:18Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-02-13T02:32:06Z</published>
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<id>urn:sha1:70a474d2c24dc3e0c8841e6ef5cc96797deadbf5</id>
<content type='text'>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.

Suggested-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>riscv_asm.h: Use CSR_&lt;FOO&gt; instead of &lt;foo&gt; for csr_read()</title>
<updated>2019-02-05T13:23:09Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2019-02-04T02:49:20Z</published>
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<id>urn:sha1:c0addfe751e51376a73df71336ce11826e68c939</id>
<content type='text'>
Some toolchains might not have all the CSRs available (as seen with
GCC 7.2). So, instead use the defined CSR_ values.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>all: Update copyright header in all files</title>
<updated>2019-01-24T08:37:47Z</updated>
<author>
<name>Anup patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-01-24T06:11:10Z</published>
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<id>urn:sha1:20990ee0abaf286917b6e2aae992d4183ff695f6</id>
<content type='text'>
This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Handle misaligned load/store on FP regs</title>
<updated>2019-01-03T22:21:08Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-01-03T06:48:47Z</published>
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<id>urn:sha1:48dc50df8f8693f86500f71a4b701b4dd0c841d7</id>
<content type='text'>
This patch extends misaligned load/store trap handling to
handle FP regs as well.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
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