opensbi.git/lib/utils/cache/cache.c, branch masterUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/opensbi.git/atom/lib/utils/cache/cache.c?h=master2026-02-11T06:41:06Zlib: utils/cache: add cache enable function2026-02-11T06:41:06ZBen Zong-You Xieben717@andestech.com2025-12-29T07:19:12Zurn:sha1:6d26b43c477a7616d1f030261430127fa6c61d27
Add functions to enable/disable the cache.
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Link: https://lore.kernel.org/r/20251229071914.1451587-4-ben717@andestech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
lib: utils: Add cache flush library2025-10-28T05:09:59ZNick Hunick.hu@sifive.com2025-10-20T06:34:03Zurn:sha1:1207c7568fbe07714e3b75f9ebf25d7ed21612fe
The current RISC-V CMO only defines how to flush a cache block. However,
certain use cases, such as power management, may require flushing the
entire cache. Therefore, a framework is being introduced to allow vendors
to flush the entire cache using their own methods.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-1-69a132447d8a@sifive.com
Signed-off-by: Anup Patel <anup@brainfault.org>