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<title>opensbi.git/lib/utils/cache/fdt_sifive_pl2.c, branch master</title>
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<updated>2025-12-08T04:31:05Z</updated>
<entry>
<title>lib: utils/cache: Add SiFive PL2 controller</title>
<updated>2025-12-08T04:31:05Z</updated>
<author>
<name>Nick Hu</name>
<email>nick.hu@sifive.com</email>
</author>
<published>2025-11-14T03:22:46Z</published>
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SiFive Private L2(PL2) cache is a private cache owned by each hart. Add
this driver to support private cache flush operations via the MMIO
registers.

Co-developed-by: Eric Lin &lt;eric.lin@sifive.com&gt;
Signed-off-by: Eric Lin &lt;eric.lin@sifive.com&gt;
Co-developed-by: Zong Li &lt;zong.li@sifive.com&gt;
Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Co-developed-by: Vincent Chen &lt;vincent.chen@sifive.com&gt;
Signed-off-by: Vincent Chen &lt;vincent.chen@sifive.com&gt;
Co-developed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Signed-off-by: Nick Hu &lt;nick.hu@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251114-sifive-cache-drivers-v1-2-8423a721924c@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
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