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<title>opensbi.git/lib/utils/fdt/fdt_fixup.c, branch v0.9</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/utils/fdt/fdt_fixup.c?h=v0.9</id>
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<updated>2020-10-20T08:34:51Z</updated>
<entry>
<title>lib: utils: Update fdt_cpu_fixup() to use current domain</title>
<updated>2020-10-20T08:34:51Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-09-22T09:10:08Z</published>
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<id>urn:sha1:5fd99dbdaa39238ebed45df3ea7dc6b47424a583</id>
<content type='text'>
The fdt_cpu_fixup() should disable a HART in DT if the HART
is not assigned to the current HART domain. This patch updates
fdt_cpu_fixup() accordingly.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Update fdt_reserved_memory_fixup() to use current domain</title>
<updated>2020-10-20T08:34:43Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-09-21T10:28:14Z</published>
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<id>urn:sha1:5edbb7cda1849b3d05e33256cafb7708c36f3020</id>
<content type='text'>
Now that each HART is mapped to a domain having a set of memory
regions, we update fdt_reserved_memory_fixup() to use domain memory
regions for adding reserved memory nodes in device tree.

We also change reserved memory node name prefix from "mmode_pmp"
to "mmode_resv" because domain memory regions can impact other
hardware configurations (such as IOPMP, etc) along with PMP.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Improve fdt_cpu_fixup() implementation</title>
<updated>2020-09-16T03:35:27Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-09-07T13:46:27Z</published>
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<id>urn:sha1:9f935a4a4372657e43b25fe2f4022fdeb3ca2387</id>
<content type='text'>
The fdt_cpu_fixup() should work fine even if HARTs without MMU
are not marked invalid by platform support code.

In future, we plan to treat HARTs without MMU as valid in the
generic platform support so that we can hold these HARTs in
HSM STOPPED state.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Remove redundant SBI_HART_HAS_PMP feature</title>
<updated>2020-09-01T04:58:26Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-08-18T06:21:16Z</published>
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<id>urn:sha1:7b0b289887380d2e71210f12b5ce0f3afc011b35</id>
<content type='text'>
The SBI_HART_HAS_PMP feature is redundant because we already
have number of PMP regions returned by sbi_hart_pmp_count().

Checking whether PMP is supported for a HART can be simply done
by checking non-zero value returned by sbi_hart_pmp_count().

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib/utils: fdt: Update FDT expand size to 1024 for reserved memory node</title>
<updated>2020-07-06T08:35:29Z</updated>
<author>
<name>Bin Meng</name>
<email>bin.meng@windriver.com</email>
</author>
<published>2020-06-25T09:36:39Z</published>
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<id>urn:sha1:a5f9104330353491fc6c0fdb42262543d39518d9</id>
<content type='text'>
Currently 256 bytes is used for the FDT expand size when fixing up
reserved memory node. Increase it to 1024 bytes with an estimated
size of 64 bytes per PMP memory region by 16 regions in total.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform/lib: Allow the OS to map the regions that are protected by PMP</title>
<updated>2020-06-15T03:55:44Z</updated>
<author>
<name>Alexandre Ghiti</name>
<email>alex@ghiti.fr</email>
</author>
<published>2020-06-13T06:59:13Z</published>
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<id>urn:sha1:6966ad0abe7077b1b5c9342f588621426d997c38</id>
<content type='text'>
This is achieved by removing the 'no-map' property from the
'reserved-memory' node when PMP is present, otherwise we keep it as it
offers a small protection if the OS does not map this region at all.
A new callback in platform_override is introduced and allows to fixup the
device-tree. It is used here to override this new default behaviour on
SiFive Fu540 platforms that has an erratum that prevents S-mode software
to access a PMP protected region using 1GB page table mapping.

If PMP is present, telling the OS not to map the reserved regions does not
add much protection since it only avoids access to regions that are already
protected by PMP. But by not allowing the OS to map those regions, it
creates holes in the OS system memory map and prevents the use of
hugepages which would generate, among other benefits, less TLB miss.

Signed-off-by: Alexandre Ghiti &lt;alex@ghiti.fr&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi_hart: Detect number of supported PMP regions</title>
<updated>2020-05-19T03:49:48Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-18T06:34:18Z</published>
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<id>urn:sha1:a38bea9341a2da29bec00d5253ac71da8ca06bab</id>
<content type='text'>
It is not mandatory for a RISC-V systems to implement all PMP
regions so we have to check all PMPADDRx CSRs to determine excat
number of supported PMP regions.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: sbi: Use scratch pointer as parmeter in HART feature APIs</title>
<updated>2020-05-19T03:49:42Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-11T06:00:15Z</published>
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<id>urn:sha1:63b0f5f71a4d6bf8539a8cbfa27228dc76e7d71a</id>
<content type='text'>
It makes more sense to have scratch pointer as parameter in
HART feature APIs because:
1. We already have scratch pointer at places where these APIs
   are used.
2. This is consistent with lot of other APIs in sbi_hart.h

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Move platform features to hart</title>
<updated>2020-05-10T04:35:41Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-05-09T23:47:28Z</published>
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<id>urn:sha1:b2df751acfd2858f2370d896f91543593647b243</id>
<content type='text'>
PMP &amp; performance counters belong to a hart rather than a platform.
In addition to that, these features enable reading/writing from a
particular csr. Thus, they can be detected and set at runtime rather
than compile time.

Move PMP/MCOUNTEREN/SCOUNTEREN features to hart and detect them at runtime.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Tested-by: Jonathan Balkind &lt;jbalkind@cs.princeton.edu&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Update reserved memory fdt node even if PMP is not present</title>
<updated>2020-05-10T04:30:02Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-05-09T23:47:26Z</published>
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<id>urn:sha1:79d0fadb0681acbba55bb6b4afcd3c2e6f725928</id>
<content type='text'>
As per RISC-V ISA, pmp is not mandatory. Currently, we only add reserved
memory node in DT only if PMP is present. That allows supervisor to access
the memory where OpenSBI continue to exist without realizing it for non-pmp
based platforms. It may result in corrupting OpenSBI. That's why OpenSBI
should at least let the supervisor know where it continue to exist.
This a best effort service provided by OpenSBI expecting that supervisor
software is not buggy and properly sets up its memory after parsing the
reserved-memory device tree node.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
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