opensbi.git/lib/utils/fdt, branch master

lib: utils/irqchip/aplic: add MSI mode support with IMSIC parent linking

2026-07-22T07:38:13Z

Add parent_unique_id fields to struct aplic_data for IMSIC parent linking in MSI mode. Store parent IMSIC unique_id during FDT parsing of the APLIC node. Add aplic_is_msi_mode() complementing aplic_is_direct_mode() to consolidate delivery mode detection. Add APLIC_TARGET_EIID() macro for packing the EIID field into the TARGET register. Add parent_unique_id and parent_irq_map fields to struct aplic_data. parent_unique_id identifies the upstream IMSIC irqchip device resolved via sbi_irqchip_find_device() during hwirq_setup. parent_irq_map is a per-source array allocated at cold init time to track the EIID assigned by the IMSIC for each APLIC source. Restore aplic_writel_msicfg() and re-introduce MSI address register programming in aplic_init(), gated on aplic_is_msi_mode(). Set the DOMAINCFG_DM bit to switch the hardware to MSI delivery mode when no IDC structures are present. Add aplic_program_msi_target() to pack hart_index, guest_index, and EIID into the APLIC_TARGET register. Add aplic_write_msi() as the sbi_irqchip write_msi callback that extracts EIID and hart_index from the MSI message and calls aplic_program_msi_target(). Add aplic_msi_callback() as the MSI receive callback that dispatches to sbi_irqchip_process_hwirq() on the APLIC chip. Extend aplic_hwirq_setup() with an MSI path that resolves the parent IMSIC chip by parent_unique_id, registers an MSI route via sbi_irqchip_register_msi(), and stores the allocated EIID in parent_irq_map for the source being configured. Extend aplic_hwirq_set_affinity() with an MSI path that delegates affinity reprogramming to the parent IMSIC chip via sbi_irqchip_set_affinity() using the stored parent_irq_map entry. Guard warm_init, process_hwirqs, and hwirq_eoi with early returns in MSI mode as interrupt delivery and acknowledgement are handled by the IMSIC in that configuration. Signed-off-by: Oza Pawandeep Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260721214833.687361-3-pawandeep.oza@oss.qualcomm.com Signed-off-by: Anup Patel

platform: generic: Optimize extensions_init() to parse ISA extensions once

2026-06-12T10:38:29Z

Instead of parsing ISA extensions separately for each hart in the generic_extensions_init() function, it is better to parse ISA extensions for all available harts in the cold boot path. Also, this allows us to remove fdt_isa_bitmap from scratch space and directly initialize "extensions" in struct sbi_hart_features for each hart. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260521082625.1520870-3-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: utils: fdt_domain: add root-regions-inheritance policy

2026-05-18T12:50:50Z

Introduce root-regions-inheritance DT property to control copying of root domain memregions. Support 'all' and 'm-only' modes, always inheriting firmware and M-only regions; behavior matches m-only policy when property is absent. Signed-off-by: Yu-Chien Peter Lin Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260516072906.1427203-1-peter.lin@sifive.com Signed-off-by: Anup Patel

lib: fdt_domain: Default boot-hart to coldboot HART for multi-domain boot

2026-05-11T04:41:06Z

When "boot-hart" is not specified, dom->boot_hartid was left as -1U, causing domain context switching to fail. Default it to the coldboot HART to enable SMP boot in multi-domain setups, consistent with how next-arg1 is handled. Also update its description in domain_support.md. Signed-off-by: Yu-Chien Peter Lin Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260327054936.3462935-1-peter.lin@sifive.com Signed-off-by: Anup Patel

lib: utils/irqchip: Add unique_id to plic, aplic, and imsic data

2026-03-22T05:25:03Z

Add a 32-bit unique ID to plic, aplic, and imsic data which can be used to differentiate multiple irqchip devices. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260213055342.3124872-7-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: fdt_helper: Removed unnecessary dt parsing check

2026-03-09T08:20:42Z

The check for the address being different from 0 for the UART, PLIC, APLIC and IMSIC dt nodes is unnnecessary and could skip valid nodes. Signed-off-by: Victoriano Morales Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260219083423.30690-1-victoriano.morales@openchip.com Signed-off-by: Anup Patel

lib: utils: Use SBI_DOMAIN_MMIO to check MMIO device permissions

2025-12-08T11:17:55Z

Drivers or platforms may create memory regions with the MMIO flag set that contain S-mode-accessible MMIO devices. This is strictly correct and should be allowed, along with the existing default case of S-mode-accessible MMIO devices appearing in non-MMIO memory regions. When passed SBI_DOMAIN_MMIO, sbi_domain_check_addr() will perform the correct set of permission checks. Signed-off-by: Samuel Holland Reviewed-by: Yu-Chien Peter Lin Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20251121193808.1528050-3-samuel.holland@sifive.com Signed-off-by: Anup Patel

lib: utils: fdt: fix "ranges" translation

2025-07-23T05:02:14Z

According to the Device Tree Spec, Chapter 2.3.8 "ranges" [1]: The parent address size will be determined from the #address-cells property of the node that defines the parent’s address space. In fdt_translate_address(), which considered the parent address size is the child address size, this commit fix the two address sizes and parsing the address independently. Signed-off-by: Max Hsu Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250711-dev-maxh-master_fdt_helper-v2-1-9579e1f02ee1@sifive.com Signed-off-by: Anup Patel

lib: utils: Fix fdt_parse_aclint_node() for non-contiguous hartid

2025-06-16T04:11:03Z

Currently, the fdt_parse_aclint_node() does not handle non-contiguous hartid correctly and returns incorrect first_hartid and hart_count. This is because the for-loop in fdt_parse_aclint_node() skips a hartid for which hartindex is not available (aka corresponding CPU DT node is disabled). For example, on a platform with 4 HARTs (hartid 0, 1, 2, and 3) where CPU DT nodes with hartid 0 and 2 are disabled, the fdt_parse_aclint_node() returns first_hartid = 1 and hart_count = 3 which is incorrect. To address the above issue, drop the sbi_hartid_to_hartindex() check from the for-loop of fdt_parse_aclint_node(). Fixes: 5e90e54a1a53 ("lib: utils:Check that hartid is valid") Reported-by: Maria Mbaye Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20250606055810.237441-1-apatel@ventanamicro.com Signed-off-by: Anup Patel

lib: utils/irqchip: always parse msi information for each aplic device

2025-06-16T03:47:28Z

OpenSBI only parses MSI information of the first next level subdomain for now, which makes the root domain misconfigured in some case: 1. the msi is not enabled on the first subdomain of the root domain, but other subdomains enable MSI. 2. the root domain is set as direct mode, but its subdomains enable MSI. So it is needed to parse all child of the root domain, Otherwise, the some non-root domains are broken. As the specification says, it is safe to parse the MSI information of all its subdomain and write the msiaddrcfg register of the non root domain as they are read only. Parse the aplic MSI information recursively for all aplic device. Reviewed-by: Anup Patel Signed-off-by: Inochi Amaoto Link: https://lore.kernel.org/r/20250523085348.1690368-1-inochiama@gmail.com Signed-off-by: Anup Patel