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<title>opensbi.git/lib/utils/fdt, branch v1.7</title>
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<id>http://cgit.235523.xyz/opensbi.git/atom/lib/utils/fdt?h=v1.7</id>
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<updated>2025-06-16T04:11:03Z</updated>
<entry>
<title>lib: utils: Fix fdt_parse_aclint_node() for non-contiguous hartid</title>
<updated>2025-06-16T04:11:03Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-06-06T05:58:10Z</published>
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<id>urn:sha1:9f64f0619334eea34df66a1816b1be589870ac4e</id>
<content type='text'>
Currently, the fdt_parse_aclint_node() does not handle non-contiguous
hartid correctly and returns incorrect first_hartid and hart_count.
This is because the for-loop in fdt_parse_aclint_node() skips a hartid
for which hartindex is not available (aka corresponding CPU DT node
is disabled).

For example, on a platform with 4 HARTs (hartid 0, 1, 2, and 3) where
CPU DT nodes with hartid 0 and 2 are disabled, the fdt_parse_aclint_node()
returns first_hartid = 1 and hart_count = 3 which is incorrect.

To address the above issue, drop the sbi_hartid_to_hartindex() check
from the for-loop of fdt_parse_aclint_node().

Fixes: 5e90e54a1a53 ("lib: utils:Check that hartid is valid")
Reported-by: Maria Mbaye &lt;MameMaria.Mbaye@microchip.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Link: https://lore.kernel.org/r/20250606055810.237441-1-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: always parse msi information for each aplic device</title>
<updated>2025-06-16T03:47:28Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@gmail.com</email>
</author>
<published>2025-05-23T08:53:48Z</published>
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<id>urn:sha1:6f8bcae4cb12d92e0c198ba3b7e2f56e2fbb7289</id>
<content type='text'>
OpenSBI only parses MSI information of the first next level subdomain
for now, which makes the root domain misconfigured in some case:
1. the msi is not enabled on the first subdomain of the root domain,
   but other subdomains enable MSI.
2. the root domain is set as direct mode, but its subdomains enable MSI.

So it is needed to parse all child of the root domain, Otherwise, the
some non-root domains are broken. As the specification says, it is
safe to parse the MSI information of all its subdomain and write the
msiaddrcfg register of the non root domain as they are read only.

Parse the aplic MSI information recursively for all aplic device.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Inochi Amaoto &lt;inochiama@gmail.com&gt;
Link: https://lore.kernel.org/r/20250523085348.1690368-1-inochiama@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: fdt: Claim Zicntr if time CSR emulation is possible</title>
<updated>2025-05-20T07:55:53Z</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-05-16T13:33:53Z</published>
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<id>urn:sha1:60c3f97de840e6ad35494f9228fc83600d1dc5a2</id>
<content type='text'>
OpenSBI is capable of emulating time CSR through an external timer
for HARTs that don't implement a full Zicntr extension. Let's add
Zicntr extension in the FDT if CSR emulation is active.

This avoids hardcoding the extension in the devicetree, which may
confuse pre-SBI bootloaders.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250516133352.36617-4-ziyao@disroot.org
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Set the scratch allocation to alignment to cacheline size</title>
<updated>2025-04-24T03:53:47Z</updated>
<author>
<name>Raj Vishwanathan</name>
<email>raj.vishwanathan@gmail.com</email>
</author>
<published>2025-04-23T22:50:45Z</published>
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<id>urn:sha1:99aabc6b8431a2bcf2b28a2423952e529de9fbc5</id>
<content type='text'>
Set the scratch allocation alignment to cacheline size specified by
riscv,cbom-block-size in the DTS file to avoid two atomic variables
from the same cache line causing livelock on some platforms. If the
cacheline is not specified, we set it a default value.

Signed-off-by: Raj Vishwanathan &lt;Raj.Vishwanathan@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Link: https://lore.kernel.org/r/20250423225045.267983-1-Raj.Vishwanathan@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Remove fdt_match_node()</title>
<updated>2025-04-23T07:02:51Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-03-25T23:43:32Z</published>
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<id>urn:sha1:0dd8a26f1f3a6091a2ea6e4175fd63a79bba86d9</id>
<content type='text'>
This function has been obsoleted by the fdt_driver library and is no
longer used.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250325234342.711447-10-samuel.holland@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Remove unnecessary SBI_INIT_LIST_HEAD</title>
<updated>2025-04-15T06:08:20Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2025-03-19T12:39:38Z</published>
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<id>urn:sha1:190979b4fce6ded989338a0943feeb035db7b75a</id>
<content type='text'>
No need to initialise the nodes to be added to the linked list

Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250319123944.505756-1-wxjstz@126.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Make sure that hartid and the scratch are aligned</title>
<updated>2025-03-26T13:41:10Z</updated>
<author>
<name>Raj Vishwanathan</name>
<email>raj.vishwanathan@gmail.com</email>
</author>
<published>2025-02-25T22:57:52Z</published>
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<id>urn:sha1:321ca8063b7ea9863cdeb6c80fe8bce340bcd04b</id>
<content type='text'>
Harts associated with an ACLINT_MSWI need not have sequential hartids.
It is insufficient to use first_hartid and hart_count. To account for
non-sequential hart ids, include the empty hart-ids' generate hart-count.

Signed-off-by: Raj Vishwanathan &lt;Raj.Vishwanathan@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Respect compatible string fallback priority</title>
<updated>2025-03-24T11:07:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-19T20:42:51Z</published>
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<id>urn:sha1:0ffe265fd969f5ac689c820a4b40a99cd2f1e9a9</id>
<content type='text'>
When matching drivers to DT nodes, always match all drivers against the
first compatible string before considering fallback compatible strings.
This ensures the most specific match is always selected, regardless of
the order of the drivers or match structures, as long as no compatible
string appears in multiple match structures.

Fixes: 1ccc52c427f3 ("lib: utils/fdt: Add helpers for generic driver initialization")
Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Allocate fdt_pmu_evt_select on the heap</title>
<updated>2025-02-19T12:55:17Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-13T22:48:39Z</published>
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<id>urn:sha1:a2c172f526b52eb428d9077fab8cd8690c7e2f19</id>
<content type='text'>
This reduces .bss size by 8 KiB, and should reduce overall memory usage
since most platforms will have significantly fewer than 512 entries in
this table. At the same time, it removes the fixed table size limit.
Since the table is only used within fdt_pmu.c, instead of updating the
extern declaration, make the table local to this file.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Remove redundant PMU property length checks</title>
<updated>2025-02-19T12:52:52Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-13T22:48:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=f95d1140f61d4afdd922379bff40edf8556c64e4'/>
<id>urn:sha1:f95d1140f61d4afdd922379bff40edf8556c64e4</id>
<content type='text'>
If a property value is too small, len will be zero after the division
on the next line, so the property will be ignored. This is the same
behavior as when the length check fails. Furthermore, the first two
length checks were already ineffectual, because each item in those
arrays is 12 bytes long, not 8.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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