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<title>opensbi.git/lib/utils/ipi/aclint_mswi.c, branch v1.3</title>
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<updated>2023-06-05T10:32:59Z</updated>
<entry>
<title>lib: utils/ipi: Use scratch space to save per-HART MSWI pointer</title>
<updated>2023-06-05T10:32:59Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-04-19T15:53:53Z</published>
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<id>urn:sha1:acbd8fce9e5d92f07d344388a3b046f1722ce072</id>
<content type='text'>
Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART MSWI pointer.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: buffer overrun aclint_mswi_cold_init</title>
<updated>2023-06-04T09:43:50Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2023-05-29T09:27:20Z</published>
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<id>urn:sha1:df75e0995689842b3022a4a8d4d69e980430c129</id>
<content type='text'>
The parameter checks in aclint_mswi_cold_init() don't guard against a
buffer overrun.

mswi_hartid2data is defined as an array of SBI_HARTMASK_MAX_BITS entries.
The current check allows

    mswi-&gt;hart_count = ACLINT_MSWI_MAX_HARTS
    mswi-&gt;first_hartid = SBI_HARTMASK_MAX_BITS - 1.

With these values mswi_hartid2data will be accessed at index

    SBI_HARTMASK_MAX_BITS + SBI_HARTMASK_MAX_BITS - 2.

We have to check the sum of mswi-&gt;first_hartid and mswi-&gt;hart_count.

Furthermore mswi-&gt;hart_count = 0 would not make much sense.

Addresses-Coverity-ID: 1529705 ("Out-of-bounds write")
Fixes: 5a049fe1d6a5 ("lib: utils/ipi: Add ACLINT MSWI library")
Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Add M-mode {R/W} flags to the MMIO regions</title>
<updated>2023-01-09T12:34:28Z</updated>
<author>
<name>Himanshu Chauhan</name>
<email>hchauhan@ventanamicro.com</email>
</author>
<published>2023-01-09T05:20:42Z</published>
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<id>urn:sha1:59a08cd7d632bb2394a29956497dfe7829099997</id>
<content type='text'>
Add the M-mode readable/writable flags to mmio regions
of various drivers.

Signed-off-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Tested-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Fix size check in aclint_mswi_cold_init()</title>
<updated>2022-01-11T12:47:07Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2022-01-06T03:32:45Z</published>
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<id>urn:sha1:5b9960379fae14b554c953b0d4139f4b1a57cd5e</id>
<content type='text'>
Currently, the ACLINT MSWI size check is forcing size to be at least
0x4000. This is inappropriate check because most systems will never
utilize full 16KB for a single ACLINT MSWI device so instead we should
check that ACLINT MSWI size is enough for on the associated HARTs.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Dong Du &lt;Dd_nirvana@sjtu.edu.cn&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Add ACLINT MSWI library</title>
<updated>2021-06-24T04:09:44Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2021-05-20T07:30:46Z</published>
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<id>urn:sha1:5a049fe1d6a5d1c381113853fce3afad6573bb56</id>
<content type='text'>
We add common ACLINT MSWI library similar to the CLINT library
so that OpenSBI platforms can use it.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
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