opensbi.git/lib/utils/irqchip/aplic.c, branch v1.9

lib: sbi_irqchip: Allow irqchip drivers advertise capabilities

2026-06-10T12:43:10Z

Extend struct sbi_irqchip_device to allow irqchip drivers advertise interrupt controller capabilities (such as wired interrupt, MSIs, etc). This further allows other parts of OpenSBI to lookup irqchip devices based on capabilities. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260608125257.3220114-2-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: sbi_irqchip: Allow registering interrupt handlers

2026-03-22T05:25:58Z

To handle external interrupts in M-mode, the sbi_irqchip framework must allow registering interrupt handlers from device drivers. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260213055342.3124872-9-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: sbi_irqchip: Associate 32-bit unique ID for each irqchip device

2026-03-22T05:25:08Z

Allow locating irqchip device instance using a unique 32-bit ID. This 32-bit unique ID can be set by the irqchip driver at the time of adding irqchip device. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260213055342.3124872-8-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: sbi_irqchip: Support irqchip device targetting subset of harts

2026-03-22T05:23:33Z

It is possible to have platform where an irqchip device targets a subset of harts and there are multiple irqchip devices to cover all harts. To support this scenario: 1) Add target_harts hartmask to struct sbi_irqchip_device which represents the set of harts targetted by the irqchip device 2) Call warm_init() and process_hwirqs() callbacks of an irqchip device on a hart only if irqchip device targets that particular hart Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260213055342.3124872-6-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

lib: utils/irqchip: Add APLIC restore function

2025-10-28T05:57:59Z

Since the APLIC may enter a reset state upon system wake-up from a platform low power state, adding a restore function to reinitialize the APLIC. Reviewed-by: Yong-Xuan Wang Reviewed-by: Cyan Yang Reviewed-by: Anup Patel Signed-off-by: Nick Hu Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-7-69a132447d8a@sifive.com Signed-off-by: Anup Patel

lib: utils/irqchip: fix aplic lock mechanism in xmsiaddrcfg(h)

2025-09-30T11:54:13Z

The section 4.5.4 "Supervisor MSI address configuration (smsiaddrcfg and smsiaddrcfgh)" of the AIA specification states that: "If register mmsiaddrcfgh of the domain has bit L set to one, then smsiaddrcfg and smsiaddrcfgh are locked as read-only alongside mmsiaddrcfg and mmsiaddrcfgh." In other words, the L bit is not defined for smsiaddrcfg[h] registers so fix aplic_writel_msicfg() accordingly. Signed-off-by: Yang Jialong Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250806032924.3532975-1-z_bajeer@yeah.net Signed-off-by: Anup Patel

lib: utils: Fix irqchip registration for PLIC and APLIC

2024-12-24T08:36:09Z

Currently, the same irqchip instance is registered for multiple PLIC and APLIC instances which causes the sbi_list_for_each_entry() loop in the sbi_irqchip_init() to hang at boot-time. To address the above issue, register a separate irqchip instance for each PLIC and APLIC instance. Fixes: 2dd6eaf68055 ("lib: sbi_irqchip: Call driver warm_init from SBI core") Reported-by: Himanshu Chauhan Signed-off-by: Anup Patel Reviewed-by: Himanshu Chauhan

lib: sbi_irqchip: Register devices during cold init

2024-11-28T06:07:25Z

Have the SBI irqchip core keep track of registered irqchip devices. This is useful for any callbacks the irqchip driver may have, such as for warm initialization, the external interrupt handler function, and any future support for handling external interrupts (beyond IPIs) in M-mode. This improves on the tracking done in fdt_irqchip.c, as it tracks device instances, not just drivers, so callbacks can target a specific device. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: utils/irqchip: Use sbi_domain_root_add_memrange() for APLIC

2024-10-25T17:29:58Z

The sbi_domain_root_add_memrange() should be preferred for creating multiple memregions over a range. Update APLIC driver to use sbi_domain_root_add_memrange() instead of explicitly registering memregions. Signed-off-by: Anup Patel Reviewed-by: Samuel Holland

lib: utils/irqchip: Avoid redundant writes to APLIC CLRIE register

2023-11-24T07:18:41Z

Each APLIC CLRIE register allows disabling 32 interrupt sources at a time by writing -1 so no need to write CLRIE register separately for each interrupt source. Fixes: 99792653de29 ("lib: utils/irqchip: Add APLIC initialization library") Signed-off-by: Anup Patel Reviewed-by: Atish Patra