opensbi.git/lib/utils/irqchip, branch v1.5

lib: utils/irqchip: Skip initialize irqchip when dt is not enabled

2024-06-13T13:03:52Z

When the dt node has a status property and the value is not ok or okay, skip initializing irqchip. Signed-off-by: Xiang W Reviewed-by: Anup Patel

lib: utils/irqchip: Add sanity checks in imsic_get_data() and imsic_get_target_file()

2024-05-23T05:21:29Z

Add extra sanity checks to prevent the caller getting the invalid result from imsic_get_data() or imsic_get_target_file() when imsic is not initialized correctly. Signed-off-by: Cyan Yang Reviewed-by: Anup Patel

lib: utils/irqchip: Check before initializing imsic

2024-05-16T04:51:16Z

The current mlevel imsic check is only for the platform, which may cause hart without imsic in the platform to trigger an illegal instruction exception when initializing imsic. For example, the platform contains a management hart that only supports wired interrupts. This patch will check if each hart supports Smaia extension before doing imsic initialization to avoid triggering illegal instruction exceptions. Signed-off-by: Cheng Yang Reviewed-by: Anup Patel

lib: sbi: Remove regs paramter of sbi_irqchip_process()

2024-03-19T06:01:33Z

The irqchip handlers will typically not need pointer to trap registers so remove regs parameter of sbi_irqchip_process(). Signed-off-by: Anup Patel Reviewed-by: Samuel Holland Tested-by: Samuel Holland Reviewed-by: Clément Léger

lib: utils/irqchip: Add shared MMIO region for PLIC in root domain

2023-12-19T10:26:37Z

On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel

lib: sbi: Allow relaxed MMIO writes in device ipi_send() callback

2023-11-26T13:15:06Z

Currently, we have a smp_wmb() between atomic_raw_set_bit() and ipi_send() device callback whereas the MMIO writes done by the device ipi_send() callback will also include a barrier. We can avoid unnecessary/redundant barriers described above by allowing relaxed MMIO writes in device ipi_send() callback. To achieve this, we simply use wmb() instead of smp_wmb() before calling device ipi_send(). Signed-off-by: Anup Patel Reported-by: Bo Gan

lib: utils/irqchip: Avoid redundant writes to APLIC CLRIE register

2023-11-24T07:18:41Z

Each APLIC CLRIE register allows disabling 32 interrupt sources at a time by writing -1 so no need to write CLRIE register separately for each interrupt source. Fixes: 99792653de29 ("lib: utils/irqchip: Add APLIC initialization library") Signed-off-by: Anup Patel Reviewed-by: Atish Patra

lib: sbi: Prefer hartindex over hartid in IPI framework

2023-09-24T06:09:38Z

Let us prefer hartindex over hartid in IPI framework which in-turn forces IPI users to also prefer hartindex. Signed-off-by: Anup Patel

lib: utils/irqchip: Use scratch space to save per-HART IMSIC pointer

2023-06-06T10:31:14Z

Instead of using a global array indexed by hartid, we should use scratch space to save per-HART IMSIC pointer and IMSIC file number. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones

lib: utils/irqchip: Don't check hartid in imsic_update_hartid_table()

2023-06-05T11:21:07Z

The imsic_map_hartid_to_data() already checks hartid before using so we don't need to check in imsic_update_hartid_table(). Signed-off-by: Anup Patel Reviewed-by: Andrew Jones