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<title>opensbi.git/lib/utils/irqchip, branch v1.8</title>
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<id>http://cgit.235523.xyz/opensbi.git/atom/lib/utils/irqchip?h=v1.8</id>
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<updated>2025-11-10T08:14:17Z</updated>
<entry>
<title>lib: utils/irqchip: plic: context_id is signed</title>
<updated>2025-11-10T08:14:17Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-11-05T11:01:21Z</published>
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<id>urn:sha1:fade4399d2a47a3ff9c5ecd5dd4c3cba7a4eace7</id>
<content type='text'>
Array context_id in struct plic_data has elements of type s16.
A negative valid indicates an invalid entry.
Copying the array element to a u32 scalar hides the sign.

Use s16 as target type when copying an array element to a scalar.

Addresses-Coverity-ID: 1667176 Unsigned compared against 0
Addresses-Coverity-ID: 1667178 Logically dead code
Addresses-Coverity-ID: 1667179 Unsigned compared against 0
Addresses-Coverity-ID: 1667182 Logically dead code
Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251105110121.47130-1-heinrich.schuchardt@canonical.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Add APLIC restore function</title>
<updated>2025-10-28T05:57:59Z</updated>
<author>
<name>Nick Hu</name>
<email>nick.hu@sifive.com</email>
</author>
<published>2025-10-20T06:34:09Z</published>
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<id>urn:sha1:c2d2b9140a94a482c0ea3b0327fcb6c483827c2a</id>
<content type='text'>
Since the APLIC may enter a reset state upon system wake-up from a
platform low power state, adding a restore function to reinitialize
the APLIC.

Reviewed-by: Yong-Xuan Wang &lt;yongxuan.wang@sifive.com&gt;
Reviewed-by: Cyan Yang &lt;cyan.yang@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Nick Hu &lt;nick.hu@sifive.com&gt;
Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-7-69a132447d8a@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: fix aplic lock mechanism in xmsiaddrcfg(h)</title>
<updated>2025-09-30T11:54:13Z</updated>
<author>
<name>Yang Jialong</name>
<email>z_bajeer@yeah.net</email>
</author>
<published>2025-08-06T03:29:24Z</published>
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<id>urn:sha1:944db4eced291f248724d9f662585257b4876e16</id>
<content type='text'>
The section 4.5.4 "Supervisor MSI address configuration (smsiaddrcfg
and smsiaddrcfgh)" of the AIA specification states that:

"If register mmsiaddrcfgh of the domain has bit L set to one, then
smsiaddrcfg and smsiaddrcfgh are locked as read-only alongside
mmsiaddrcfg and mmsiaddrcfgh."

In other words, the L bit is not defined for smsiaddrcfg[h] registers
so fix aplic_writel_msicfg() accordingly.

Signed-off-by: Yang Jialong &lt;z_bajeer@yeah.net&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250806032924.3532975-1-z_bajeer@yeah.net
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Introduce IPI device rating</title>
<updated>2025-09-16T04:26:31Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-09-04T05:24:08Z</published>
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<id>urn:sha1:ee92afa63892cd6c536b623570d8ddde14760c0b</id>
<content type='text'>
A platform can have multiple IPI devices (such as ACLINT MSWI,
AIA IMSIC, etc). Currently, OpenSBI rely on platform calling
the sbi_ipi_set_device() function in correct order and prefer
the first avaiable IPI device which is fragile.

Instead of the above, introduce IPI device rating and prefer
the highest rated IPI device. This further allows extending
the sbi_ipi_raw_clear() to clear all available IPI devices.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Tested-by: Nick Hu &lt;nick.hu@sifive.com&gt;
Link: https://lore.kernel.org/r/20250904052410.546818-2-apatel@ventanamicro.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Use sbi_hart_count() and sbi_for_each_hartindex()</title>
<updated>2025-03-24T12:27:20Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-20T18:42:30Z</published>
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<id>urn:sha1:949c83a799e91cb57903932a84ec63fd14de5dc6</id>
<content type='text'>
Simplify the code and improve consistency by using the new macros where
possible. sbi_hart_count() obsoletes sbi_scratch_last_hartindex().

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>Revert "lib: utils/irqchip: Match against more specific compatible strings first"</title>
<updated>2025-03-24T11:07:52Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-19T20:42:52Z</published>
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<id>urn:sha1:98c0a3860a3c883a76a617de369a39508fde148a</id>
<content type='text'>
This reverts commit 6019259dfbdf9322858b4e7cfc3d1448376e2aa0.

Now that fdt_driver_init_by_offset() respects the compatible string
fallback priority order, this workaround is no longer necessary.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Match against more specific compatible strings first</title>
<updated>2025-02-19T16:19:08Z</updated>
<author>
<name>Alex Studer</name>
<email>alex@studer.dev</email>
</author>
<published>2025-02-14T06:27:38Z</published>
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<id>urn:sha1:6019259dfbdf9322858b4e7cfc3d1448376e2aa0</id>
<content type='text'>
The T-HEAD C90x PLIC has some special quirks, such as the S-mode
delegation bit. OpenSBI currently handles this by checking the compatible
string in the device tree.

However, this matching is done in the order of the fdt_match array. So if
a device tree contains both strings, for example:

	compatible = "thead,c900-plic", "riscv,plic0";

Then OpenSBI will match against the generic "riscv,plic0" string, since
that appears first in the fdt_match array. This means it will fail to set
the S-mode delegation bit, and Linux will fail to boot. In some cases, it
is not possible to change the compatible string to just the T-HEAD PLIC,
as older versions of Linux only recognize the RISC-V compatible string.

This patch fixes that by moving the RISC-V string to the end, ensuring
that the more specific options get matched first.

Signed-off-by: Alex Studer &lt;alex@studer.dev&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Use fdt_driver for initialization</title>
<updated>2025-02-12T15:52:37Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-01-19T19:03:55Z</published>
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<id>urn:sha1:9e1a1518d45968bb08f0996622ab25379135cf39</id>
<content type='text'>
The irqchip driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_irqchip_init() performs a
best-effort initialization of all matching DT nodes.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Fix irqchip registration for PLIC and APLIC</title>
<updated>2024-12-24T08:36:09Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2024-12-24T07:59:17Z</published>
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<id>urn:sha1:7150db29d7186808cc0df66b54dde1cb0ffe3535</id>
<content type='text'>
Currently, the same irqchip instance is registered for multiple PLIC
and APLIC instances which causes the sbi_list_for_each_entry() loop
in the sbi_irqchip_init() to hang at boot-time.

To address the above issue, register a separate irqchip instance for
each PLIC and APLIC instance.

Fixes: 2dd6eaf68055 ("lib: sbi_irqchip: Call driver warm_init from SBI core")
Reported-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>treewide: Make carray arrays const and NULL-terminated</title>
<updated>2024-11-28T11:39:17Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-11-11T22:02:45Z</published>
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<id>urn:sha1:df1c1000014049d95d65de831f9015a2dcf9fa34</id>
<content type='text'>
This allows the compiler to generate significantly better code, because
it does not have to maintain either the loop counter or loop limit. Plus
there are half as many symbols to relocate. This also simplifies passing
carray arrays to helper functions.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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