<feed xmlns='http://www.w3.org/2005/Atom'>
<title>opensbi.git/lib/utils/reset/Kconfig, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/lib/utils/reset/Kconfig?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/opensbi.git/atom/lib/utils/reset/Kconfig?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/'/>
<updated>2026-06-15T04:40:25Z</updated>
<entry>
<title>lib: utils/reset: Add litex SoC reset driver</title>
<updated>2026-06-15T04:40:25Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@gmail.com</email>
</author>
<published>2026-05-29T08:52:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=dec9141a77058dc941f2d0f07107f7306a995c35'/>
<id>urn:sha1:dec9141a77058dc941f2d0f07107f7306a995c35</id>
<content type='text'>
Litex SoC controller supports reboot function by toggling the first
bit of the ctrl register. Add a reset driver so other software can
use it.

Signed-off-by: Inochi Amaoto &lt;inochiama@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20260529085234.1682842-1-inochiama@gmail.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: add SpacemiT P1 PMIC support</title>
<updated>2026-05-11T13:51:31Z</updated>
<author>
<name>Aurelien Jarno</name>
<email>aurelien@aurel32.net</email>
</author>
<published>2026-04-19T14:49:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=d9637d00bf47a3cc17306fc62e71652c8a83c289'/>
<id>urn:sha1:d9637d00bf47a3cc17306fc62e71652c8a83c289</id>
<content type='text'>
The SpacemiT P1 is a PMIC commonly found with SpacemiT CPU like K1. Add
a reset driver for it.

Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Tested-by: Anand Moon &lt;linux.amoon@gmail.com&gt;
Link: https://lore.kernel.org/r/20260419150857.2705843-3-aurelien@aurel32.net
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/hsm: factor out ATCSMU code into an HSM driver</title>
<updated>2026-02-11T06:33:50Z</updated>
<author>
<name>Ben Zong-You Xie</name>
<email>ben717@andestech.com</email>
</author>
<published>2025-12-29T07:19:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=9ffacc8ae1ca07ed36d57f887d62a65ae7a44223'/>
<id>urn:sha1:9ffacc8ae1ca07ed36d57f887d62a65ae7a44223</id>
<content type='text'>
Refactor ATCSMU (System Management Unit) support by moving it from a
system utility into a dedicated FDT-based HSM driver.

Key changes include:

- Moving the functions in lib/utils/sys/atcsmu.c into the new HSM driver
- Moving hart start and stop operations on AE350 platform into the new
  HSM driver
- Converting the assembly-based functions in sleep.S to C code for the
  readability
- Updating the ATCWDT200 driver

Signed-off-by: Ben Zong-You Xie &lt;ben717@andestech.com&gt;
Signed-off-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Link: https://lore.kernel.org/r/20251229071914.1451587-2-ben717@andestech.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib/utils: reset: Add RPMI System Reset driver</title>
<updated>2024-12-06T03:56:27Z</updated>
<author>
<name>Rahul Pathak</name>
<email>rpathak@ventanamicro.com</email>
</author>
<published>2024-08-06T04:54:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=6a26726e08e4d1e23b2e6cce073689ecdabf9291'/>
<id>urn:sha1:6a26726e08e4d1e23b2e6cce073689ecdabf9291</id>
<content type='text'>
Add RPMI based driver for system reset and enable it in the generic
platform defconfig

Signed-off-by: Rahul Pathak &lt;rpathak@ventanamicro.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>utils/reset: Add SG2042 hwmon MCU support.</title>
<updated>2024-05-15T06:17:15Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2024-04-28T01:24:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=ea9cf6aa28ca308f6a2561da5b570ed9f6148978'/>
<id>urn:sha1:ea9cf6aa28ca308f6a2561da5b570ed9f6148978</id>
<content type='text'>
SG2042 uses an onboard MCU to provide reset function.
Add reset driver to support this onboard MCU.

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>utils/reset: Remove fdt_reset_thead</title>
<updated>2023-11-16T10:55:23Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2023-10-12T08:59:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=d1e0f7f25b2f1527425942dfc327f1d4a61bbff4'/>
<id>urn:sha1:d1e0f7f25b2f1527425942dfc327f1d4a61bbff4</id>
<content type='text'>
In the past, we used fdt_reset_thead to help customers with prototype
verification. However, with the emergence of the Big-little SoC system,
it can no longer meet the demand. Therefore, we use zero_stage_boot
instead of fdt_reset_thead. It cleans up the opensbi code and ends the
disputation of reset_sample's dts.

This patch removes the fdt_reset_thead component and updates the related
doc.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: Remove SiFive Test reset driver</title>
<updated>2023-07-31T08:39:24Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T12:50:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=c2e602707dc0f915e96b8726d63d569cbb6724b4'/>
<id>urn:sha1:c2e602707dc0f915e96b8726d63d569cbb6724b4</id>
<content type='text'>
The functionality of SiFive Test reset driver is easily available
through Syscon reset driver so let us remove the SiFive Test driver.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: Add syscon based reboot and poweroff</title>
<updated>2023-07-31T08:39:21Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T12:41:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=4a344a9b4cc89f64ab5326f428696e15bc2fcdba'/>
<id>urn:sha1:4a344a9b4cc89f64ab5326f428696e15bc2fcdba</id>
<content type='text'>
Let us have common FDT based reset driver for syscon reboot and
poweroff. The device tree bindings for syscon reboot and poweroff
are already available in the Linux kernel sources.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>lib: reset/fdt_reset_atcwdt200: Use defined macros and function in atcsmu.h</title>
<updated>2023-01-22T12:03:13Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-01-20T03:05:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=7aaeeab9e794e5a15a0253ef3c3453496f74117a'/>
<id>urn:sha1:7aaeeab9e794e5a15a0253ef3c3453496f74117a</id>
<content type='text'>
Reuse the smu related macros and function in atcsmu.h.

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: Add Andes fdt reset driver support</title>
<updated>2022-10-23T04:59:23Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2022-10-14T00:32:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=8234fc1bdf4629fc0fec41ebc2e091c407ef8d6a'/>
<id>urn:sha1:8234fc1bdf4629fc0fec41ebc2e091c407ef8d6a</id>
<content type='text'>
Add ATCWDT200 as reset device of AE350 platform, this driver requires
SMU to program the reset vector registers before triggering WDT software
restart signal.

dts example:

  smu@f0100000 {
    compatible = "andestech,atcsmu";
    reg = &lt;0x00000000 0xf0100000 0x00000000 0x00001000&gt;;
  };

  wdt: wdt@f0500000 {
    compatible = "andestech,atcwdt200";
    reg = &lt;0x00000000 0xf0500000 0x00000000 0x00001000&gt;;
    interrupts = &lt;3 4&gt;;
    interrupt-parent = &lt;&amp;plic0&gt;;
    clock-frequency = &lt;15000000&gt;;
  };

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
</feed>
