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<title>opensbi.git/lib/utils/serial/fdt_serial_shakti.c, branch v1.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2022-07-30T06:09:10Z</updated>
<entry>
<title>lib: utils/serial: Initialize platform_uart_data to zero</title>
<updated>2022-07-30T06:09:10Z</updated>
<author>
<name>Andrew Jones</name>
<email>ajones@ventanamicro.com</email>
</author>
<published>2022-07-18T17:20:26Z</published>
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<id>urn:sha1:7d28d3be50c5f8b9e4780a305ab3c39062e486c1</id>
<content type='text'>
While it doesn't look like there are any current cases of using
uninitialized data, let's zero all the UART data members to be
safe. Zero may not actually be better than a random number in
some cases, so all structure members should still be validated
before use, but at least zero is usually easier to debug than
some random stack garbage...

Signed-off-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Simplify console platform operations</title>
<updated>2021-04-28T11:28:23Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2021-04-21T12:33:50Z</published>
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<id>urn:sha1:068ca086af2312d56efe51a724d78d84e1339ab4</id>
<content type='text'>
Instead of having console_putc() and console_getc() callbacks in
platform operations, it will be much simpler for console driver to
directly register these operations as device to the sbi_console
implementation.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>platform: Add support for Shakti C-class SoC from IIT-M</title>
<updated>2020-06-19T03:51:46Z</updated>
<author>
<name>Vijai Kumar K</name>
<email>vijai@behindbytes.com</email>
</author>
<published>2020-06-17T13:55:16Z</published>
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<id>urn:sha1:db56ef367cd6dc9dab94076f4c8a3fa9d91bd1f2</id>
<content type='text'>
C-Class is a member of the SHAKTI family of processors from Indian
Institute of Technology - Madras(IIT-M).
It is an extremely configurable and commercial-grade 5-stage in-order
core supporting the standard RV64GCSUN ISA extensions.

https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md

We add OpenSBI support for Shakti C-class SoC.

Signed-off-by: Vijai Kumar K &lt;vijai@behindbytes.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
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