opensbi.git/lib/utils/suspend/objects.mk, branch v1.8

lib: utils/suspend: Add SiFive SMC0 driver

2025-10-28T05:58:10Z

The SiFive SMC0 controls the clock and power domain of the core complex on the SiFive platform. The core complex enters the low power state after the secondary cores enter the tile power gating and last core execute the `CEASE` instruction with the corresponding SMC0 configurations. The devices that inside both tile power domain and core complex power domain will be off, including caches and timer. Therefore we need to flush the last level cache before entering the core complex power gating and update the timer after waking up. Reviewed-by: Cyan Yang Reviewed-by: Anup Patel Signed-off-by: Nick Hu Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-12-69a132447d8a@sifive.com Signed-off-by: Anup Patel

lib: utils: Initialize miscellaneous drivers in one pass

2025-02-12T16:09:25Z

For driver subsystems that are not tightly integrated into the OpenSBI init sequence, it is not important that the drivers are initialized in any particular order. By putting all of these drivers in one array, they can all be initialized with a single pass through the devicetree. This saves about 10 ms of boot time on HiFive Unmatched. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: utils/suspend: Add RPMI system suspend driver

2024-12-06T03:56:32Z

Add RPMI based system suspend driver. To test this, execute the follwoing in Linux: $ echo mem > /sys/power/state To wake up, execute the following command on qemu monitor terminal: (qemu) system_wakeup Signed-off-by: Subrahmanya Lingappa Signed-off-by: Anup Patel

lib: utils: Add simple FDT based system suspend driver framework

2024-12-06T03:56:29Z

The generic platform can have multiple system suspend drivers so add a simple FDT based system suspend driver framework. Signed-off-by: Anup Patel