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<title>opensbi.git/lib, branch v1.5</title>
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<updated>2024-06-28T03:06:46Z</updated>
<entry>
<title>lib: sbi: check incoming dbtr shmem address</title>
<updated>2024-06-28T03:06:46Z</updated>
<author>
<name>Sergey Matyukevich</name>
<email>geomatsi@gmail.com</email>
</author>
<published>2024-06-27T12:04:09Z</published>
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<id>urn:sha1:23b7badeee3caa1445784273ba5dc8dbcbba7c34</id>
<content type='text'>
Current Debug Trigger SBI extension proposal suggests to activate
shmem area and obtain its physical address from S-mode software
in the following way:

: If both `shmem_phys_lo` and `shmem_phys_hi` parameters are not
: all-ones bitwise then `shmem_phys_lo` specifies the lower XLEN
: bits and `shmem_phys_hi` specifies the upper XLEN bits of the
: shared memory physical base address. The `shmem_phys_lo` MUST
: be `(XLEN / 8)` byte aligned and the size of shared memory is
: assumed to be `trig_max * (XLEN / 2)` bytes.

For more details see the current version of the proposal:
- https://lists.riscv.org/g/tech-debug/message/1302

On the other hand, on RV32, the M-mode can only access the first 4GB of
the physical address space because M-mode does not have MMU to access
full 34-bit physical address space. Similarly, on RV64, the M-mode can
only access memory addressed by 64 bits.

This commit checks shmem address in function sbi_dbtr_setup_shmem
to make sure that shmem_phys_hi part of the valid address is zero.
Besides, the macro DBTR_SHMEM_MAKE_PHYS is updated to take into
account only low XLEN part.

Signed-off-by: Sergey Matyukevich &lt;geomatsi@gmail.com&gt;
Reviewed-by: Himanshu Chauhan &lt;hchauhan@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: fwft: return SBI_EINVAL rather than SBI_ERR_INVALID_PARAM</title>
<updated>2024-06-26T12:44:49Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-24T10:29:09Z</published>
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<id>urn:sha1:caae2f7d455c78c509782e1eb8d47dfdd874b903</id>
<content type='text'>
Error code returned by the ecall handles should use the defines from
sbi_ecall_interface.h rather than sbi_error.h.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: fwft: check feature value to be exactly 1 or 0</title>
<updated>2024-06-26T12:43:54Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-24T10:29:08Z</published>
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<id>urn:sha1:e8717d126401435896b0e96c18e187f0b2431d5e</id>
<content type='text'>
As stated by the spec and pointed out by Andrew Jones, the value passed
for MISALIGNED_EXC_DELEG and PTE_AD_HW_UPDATING should be either 0 or 1.
Add check for these values and return SBI_EINVAL if not.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: implement SBI FWFT extension</title>
<updated>2024-06-19T12:45:28Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-19T09:42:42Z</published>
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<id>urn:sha1:ecef14d5732f837cbfa4a8cefa8fed7953e7abfb</id>
<content type='text'>
The SBI FWFT extension defines a set of function that can be called
to control the configuration of some platform features (misaligned
trap delegation, etc). This patch implements sbi_fwft_set() and
sbi_fwft_get() as defined in the specification [1].

Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: fwft: add support for SBI_FWFT_PTE_AD_HW_UPDATING</title>
<updated>2024-06-19T12:41:26Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-19T09:42:41Z</published>
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<id>urn:sha1:e9ee9678ba509f42a93c8de518710c225c0499f5</id>
<content type='text'>
Add support for SBI_FWFT_PTE_AD_HW_UPDATING based on SVADU presence.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: fwft: add support for SBI_FWFT_MISALIGNED_EXC_DELEG</title>
<updated>2024-06-19T12:40:36Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-19T09:42:40Z</published>
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<id>urn:sha1:c97a1d58918bcdbbb5dbabaf869b09be2b877577</id>
<content type='text'>
Add support for SBI_FWFT_MISALIGNED_EXC_DELEG withing FWFT support. This
support allows to delegate misaligned accesses traps.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: add support for firmware features extension</title>
<updated>2024-06-19T12:39:22Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2024-06-19T09:42:39Z</published>
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<id>urn:sha1:aa5a8593696b39059832d12455c31dcfeb4d9259</id>
<content type='text'>
This extension allows the software running in supervisor mode to control
the behavior of various features of the SBI [1]. Implement the support
for such extension.

Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Add support for Svade and Svadu extensions</title>
<updated>2024-06-18T11:11:32Z</updated>
<author>
<name>Yong-Xuan Wang</name>
<email>yongxuan.wang@sifive.com</email>
</author>
<published>2024-06-05T12:11:09Z</published>
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<id>urn:sha1:53844c98d082cbba29a6e568196add6de95e858f</id>
<content type='text'>
Add support for Svade and Svadu extensions. When both are present in the
device tree, the M-mode firmware should select the Svade extension
to comply with the RVA23 profile, which mandates Svade and lists Svadu as
an optional extension.

Signed-off-by: Yong-Xuan Wang &lt;yongxuan.wang@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: serial: fix RX path in litex-uart</title>
<updated>2024-06-13T16:24:09Z</updated>
<author>
<name>Gabriel Somlo</name>
<email>gsomlo@gmail.com</email>
</author>
<published>2024-06-07T18:23:42Z</published>
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<id>urn:sha1:7830e987856eb1319c82664702892b6d50a93e7a</id>
<content type='text'>
When used to read characters from the terminal (e.g., when the SBI
console is used via ecall from linux with `console=hvc0`), we must
acknowledge receipt of each character to "pop" it off the LiteUART
hardware queue, and allow the next character to be made available.

Fixes: 52af6e4b ("lib: utils: Add LiteX UART support")
Suggested-by: Dolu1990 &lt;charles.papon.90@gmail.com&gt;
Signed-off-by: Gabriel Somlo &lt;gsomlo@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: Try initializing all reset devices in dt</title>
<updated>2024-06-13T16:18:03Z</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2024-06-13T15:03:07Z</published>
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<id>urn:sha1:62e178a0a7b989d7cab9b2d4e33b291bc9a58c65</id>
<content type='text'>
In DT, multiple reset devices may use the same driver, and they
may have different priorities. If rc is returned after the first
initialization, the highest priority device may be lost.

Fixes: a73ff043e991 (lib: utils/reset: Fix fdt_reset to search for more dt nodes)
Signed-off-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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