opensbi.git/platform/andes/ae350/objects.mk, branch master

platform: generic/andes: Enable generic platform support for AE350

2022-12-05T11:54:32Z

We move andes directory to platform/generic as the necessary fdt drivers are available, the users can enable the console, timer, ipi, irqchip and reset devices by adding device tree nodes stated in the docs/platform/andes-ae350.md. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Bin Meng Reviewed-by: Anup Patel

lib: utils/ipi: Add Andes fdt ipi driver support

2022-10-23T05:01:01Z

Move Andes PLICSW ipi device to fdt ipi framework, this patch is based on Leo's modified IPI scheme on PLICSW. Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according to spec. After some investigation, self-IPI seems to be seldom or never used, so we re-order the IPI scheme to support 8 core platforms. dts example (Quad-core AX45MP): plicsw: interrupt-controller@e6400000 { compatible = "andestech,plicsw"; reg = <0x00000000 0xe6400000 0x00000000 0x00400000>; interrupts-extended = <&CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>; interrupt-controller; #address-cells = <2>; #interrupt-cells = <2>; }; Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

lib: utils/timer: Add Andes fdt timer support

2022-10-23T04:56:39Z

Since we can get the PLMT base address and timer frequency from device tree, move plmt timer device to fdt timer framework. dts example (Quad-core AX45MP): cpus { ... timebase-frequency = <0x3938700>; ... } soc { ... plmt0@e6000000 { compatible = "andestech,plmt0"; reg = <0x00 0xe6000000 0x00 0x100000>; interrupts-extended = <&cpu0_intc 0x07 &cpu1_intc 0x07 &cpu2_intc 0x07 &cpu3_intc 0x07>; }; ... } Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

platform: Remove redundant config.mk from all platforms

2022-08-08T04:04:25Z

The options defined in config.mk can be specified in objects.mk of each platform so let us remove config.mk from all platforms. Signed-off-by: Anup Patel Tested-by: Andrew Jones Acked-by: Atish Patra Tested-by: Atish Patra

platform: Add AE350 cache control SBIs

2020-06-10T03:58:52Z

This patch contains the following AE350 specific SBIs: - get mcache_ctl status - get mmisc_ctl status - set mcache_ctl status - set mmisc_ctl status - I-cache operation - D-cache operation - enable/disable L1-I-cache prefetch - enable/disable L1-D-cache prefetch - enable/disable non-blocking load store - enable/disable write-around Signed-off-by: Nylon Chen Reviewed-by: Anup Patel Reviewed-by: Atish Patra

platform: ae350: Sort build objects in alphabetical order

2020-03-10T04:43:02Z

Signed-off-by: Bin Meng Reviewed-by: Anup Patel

platform: Add Andes AE350 initial support

2019-08-23T10:55:56Z

This commit provides basic support for the AE350 platform. Signed-off-by: Zong Li Signed-off-by: Nylon Chen