opensbi.git/platform/andes, branch master

platform: generic/andes: Enable generic platform support for AE350

2022-12-05T11:54:32Z

We move andes directory to platform/generic as the necessary fdt drivers are available, the users can enable the console, timer, ipi, irqchip and reset devices by adding device tree nodes stated in the docs/platform/andes-ae350.md. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Bin Meng Reviewed-by: Anup Patel

platform: andes/ae350: Add AE350 domain support

2022-10-23T05:05:00Z

Add domains_init platform hook for Andes AE350, users can add domain description in device tree and select FDT domain support in Kconfig to achieve system-level partitioning. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel

lib: utils/ipi: Add Andes fdt ipi driver support

2022-10-23T05:01:01Z

Move Andes PLICSW ipi device to fdt ipi framework, this patch is based on Leo's modified IPI scheme on PLICSW. Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according to spec. After some investigation, self-IPI seems to be seldom or never used, so we re-order the IPI scheme to support 8 core platforms. dts example (Quad-core AX45MP): plicsw: interrupt-controller@e6400000 { compatible = "andestech,plicsw"; reg = <0x00000000 0xe6400000 0x00000000 0x00400000>; interrupts-extended = <&CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>; interrupt-controller; #address-cells = <2>; #interrupt-cells = <2>; }; Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

platform: andes/ae350: Add fw_platform_init for platform initialization

2022-10-23T05:00:21Z

This patch adds fw_platform_init() to initialize ae350 platform.name and platform.hart_count by parsing device tree. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel

platform: andes/ae350: Use fdt irqchip driver

2022-10-23T04:59:58Z

Andes PLIC is compatible with plic driver. The PLIC base address and number of source can be obtained by parsing the device tree. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel

lib: utils/reset: Add Andes fdt reset driver support

2022-10-23T04:59:23Z

Add ATCWDT200 as reset device of AE350 platform, this driver requires SMU to program the reset vector registers before triggering WDT software restart signal. dts example: smu@f0100000 { compatible = "andestech,atcsmu"; reg = <0x00000000 0xf0100000 0x00000000 0x00001000>; }; wdt: wdt@f0500000 { compatible = "andestech,atcwdt200"; reg = <0x00000000 0xf0500000 0x00000000 0x00001000>; interrupts = <3 4>; interrupt-parent = <&plic0>; clock-frequency = <15000000>; }; Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel

lib: utils/timer: Add Andes fdt timer support

2022-10-23T04:56:39Z

Since we can get the PLMT base address and timer frequency from device tree, move plmt timer device to fdt timer framework. dts example (Quad-core AX45MP): cpus { ... timebase-frequency = <0x3938700>; ... } soc { ... plmt0@e6000000 { compatible = "andestech,plmt0"; reg = <0x00 0xe6000000 0x00 0x100000>; interrupts-extended = <&cpu0_intc 0x07 &cpu1_intc 0x07 &cpu2_intc 0x07 &cpu3_intc 0x07>; }; ... } Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

platform: andes/ae350: Use fdt serial driver

2022-10-23T04:56:06Z

Andes UART is compatible with uart8250 driver. We can use fdt_serial_init() as platform console init hook. dts example: serial0: serial@f0300000 { compatible = "andestech,uart16550", "ns16550a"; reg = <0x00000000 0xf0300000 0x00000000 0x00001000>; interrupts = <9 4>; interrupt-parent = <&plic0>; clock-frequency = <19660800>; current-speed = <38400>; reg-shift = <2>; reg-offset = <32>; reg-io-width = <4>; no-loopback-test = <1>; }; Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

platform: andes/ae350: Use kconfig to set platform version and default name

2022-10-23T04:55:13Z

This patch makes andes platform name and version can be set in menuconfig interface. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel

platform: andes/ae350: Remove enabling cache from an350_final_init

2022-10-23T04:53:13Z

The boot-time cache operations have been handled by U-boot SPL, so we can drop duplicate code. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel