opensbi.git/platform/generic/Kconfig, branch release-1.3.x

platform: generic: andes/renesas: Add SBI EXT to check for enabling IOCP errata

2023-04-14T12:05:04Z

platform: generic: renesas: rzfive: Configure the PMA region

2023-02-27T06:06:06Z

On the Renesas RZ/Five SoC by default we want to configure 128MiB of memory ranging from 0x58000000 as a non-cacheable + bufferable region in the PMA and populate this region as PMA reserve DT node with shared DMA pool and no-map flags set so that Linux drivers requesting any DMA'able memory go through this region. PMA node passed to the above stack: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; pma_resv0@58000000 { compatible = "shared-dma-pool"; reg = <0x0 0x58000000 0x0 0x08000000>; no-map; linux,dma-default; }; }; Signed-off-by: Lad Prabhakar Reviewed-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

platform: generic: renesas: rzfive: Add support to configure the PMA

2023-02-27T06:05:01Z

I/O Coherence Port (IOCP) provides an AXI interface for connecting external non-caching masters, such as DMA controllers. The accesses from IOCP are coherent with D-Caches and L2 Cache. IOCP is a specification option and is disabled on the Renesas RZ/Five SoC due to this reason IP blocks using DMA will fail. The Andes AX45MP core has a Programmable Physical Memory Attributes (PMA) block that allows dynamic adjustment of memory attributes in the runtime. It contains a configurable amount of PMA entries implemented as CSR registers to control the attributes of memory locations in interest. Below are the memory attributes supported: * Device, Non-bufferable * Device, bufferable * Memory, Non-cacheable, Non-bufferable * Memory, Non-cacheable, Bufferable * Memory, Write-back, No-allocate * Memory, Write-back, Read-allocate * Memory, Write-back, Write-allocate * Memory, Write-back, Read and Write-allocate More info about PMA (section 10.3): Link: http://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf As a workaround for SoCs with IOCP disabled CMO needs to be handled by software. Firstly OpenSBI configures the memory region as "Memory, Non-cacheable, Bufferable" and passes this region as a global shared dma pool as a DT node. With DMA_GLOBAL_POOL enabled all DMA allocations happen from this region and synchronization callbacks are implemented to synchronize when doing DMA transactions. Example PMA region passed as a DT node from OpenSBI: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; pma_resv0@58000000 { compatible = "shared-dma-pool"; reg = <0x0 0x58000000 0x0 0x08000000>; no-map; linux,dma-default; }; }; Signed-off-by: Lad Prabhakar Reviewed-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

lib: utils: atcsmu: Add Andes System Management Unit support

2023-01-22T12:02:50Z

This patch adds atcsmu support for Andes AE350 platforms. The SMU provides system management capabilities, including clock, reset and power control based on power domain partitions. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Anup Patel

generic/starfive: Add Starfive JH7110 platform implementation

2023-01-07T10:30:22Z

Add Starfive JH7110 platform implementation Signed-off-by: Wei Liang Lim Reviewed-by: Chee Hong Ang Reviewed-by: Jun Liang Tan Reviewed-by: Anup Patel

platform: generic: Add Renesas RZ/Five initial support

2022-12-12T13:20:56Z

This commit provides basic support for the Renesas RZ/Five (R9A07G043F) SoC. The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP) 1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include: - Gigabit Ethernet 2ch - CAN interface (CAN-FD) 2ch - USB 2.0 interface 2ch - SD interface 2ch - AD converter 2ch Useful links: ------------- Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/ Signed-off-by: Lad Prabhakar Reviewed-by: Anup Patel

platform: generic/andes: Enable generic platform support for AE350

2022-12-05T11:54:32Z

We move andes directory to platform/generic as the necessary fdt drivers are available, the users can enable the console, timer, ipi, irqchip and reset devices by adding device tree nodes stated in the docs/platform/andes-ae350.md. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Bin Meng Reviewed-by: Anup Patel

platform: generic: Use kconfig to set platform version and default name

2022-08-08T04:04:20Z

The generic platform version and default name should be set based on kconfig options so that users can override it. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones Tested-by: Andrew Jones Acked-by: Atish Patra Tested-by: Atish Patra

platform: generic: Use kconfig for enabling/disabling overrides

2022-08-08T04:04:14Z

We update generic platform to use kconfig for enabling/disabling platform overrides. We also enable all platform overrides in generic platform defconfig. Signed-off-by: Anup Patel Tested-by: Andrew Jones Acked-by: Atish Patra Tested-by: Atish Patra

lib: utils/fdt: Use kconfig for enabling/disabling

2022-08-08T04:04:08Z

We update FDT support makefile to use kconfig for enabling/disabling. To avoid compilation errors, we also enable FDT for each platform. Signed-off-by: Anup Patel Tested-by: Andrew Jones Acked-by: Atish Patra Tested-by: Atish Patra