opensbi.git/platform/generic/allwinner, branch master

platform: generic: Optimize extensions_init() to parse ISA extensions once

2026-06-12T10:38:29Z

Instead of parsing ISA extensions separately for each hart in the generic_extensions_init() function, it is better to parse ISA extensions for all available harts in the cold boot path. Also, this allows us to remove fdt_isa_bitmap from scratch space and directly initialize "extensions" in struct sbi_hart_features for each hart. Signed-off-by: Anup Patel Link: https://lore.kernel.org/r/20260521082625.1520870-3-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel

platform: generic: Remove platform override hooks

2025-04-23T07:02:51Z

Now that all of the overrides are modifying generic_platform_ops directly, remove the unused hooks and forwarding functions. The remaining members of struct platform_override match struct fdt_driver, so use that type instead. This allows a future commit to reuse the fdt_driver-based init function. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250325234342.711447-8-samuel.holland@sifive.com Signed-off-by: Anup Patel

platform: generic: Modify platform ops instead of using hooks

2025-04-23T07:02:51Z

Switch all existing platform overrides to use the helper pattern instead of the platform hooks. After this commit, only the .match_table and .init members of struct platform_override are used. There are two minor behavioral differences: - For Allwinner D1, fdt_add_cpu_idle_states() is now called before the body of generic_final_init(). This should have no functional impact. - For StarFive JH7110, if the /chosen/starfive,boot-hart-id property is missing, the code now falls back to using generic_coldboot_harts, instead of accepting any hart. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20250325234342.711447-7-samuel.holland@sifive.com Signed-off-by: Anup Patel

lib: sbi: Add optional resume address to hart suspend

2024-12-06T03:56:35Z

Add an optional resume address to the platform specific hart suspend call. Signed-off-by: Subrahmanya Lingappa Signed-off-by: Anup Patel

lib: utils/irqchip: Move per-hart data from fdt_plic to plic

2024-11-28T06:05:01Z

The per-hart PLIC pointer is not really specific to FDT platforms. Move it into the main driver and drop the extra wrapper functions. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

lib: utils/irqchip: plic: Common PM save/restore

2024-11-28T05:58:38Z

Move the PLIC save/restore functions inside the driver, so they can be reused on any platform that needs them. The memory needed to store the PLIC context is also allocated by the driver. The PM data cannot be completely encapsulated, as some platforms (including Allwinner D1) need to program the IRQ enable status to a sideband interrupt controller for wakeup capability. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

platform: generic: Pass FDT to early/final_init overrides

2024-08-24T07:32:54Z

Several of these override functions access the FDT blob. Explicitly indicate which callbacks are allowed to modify the FDT blob by passing the parameter as a possibly-const pointer. This also reduces code size by deduplicating the call to fdt_get_address(). Signed-off-by: Samuel Holland Reviewed-by: Andrew Jones Reviewed-by: Anup Patel

platform: generic: allwinner: Optimize current hart scratch access

2024-04-05T12:04:25Z

The address of the local scratch area is stored in each hart's mscratch CSR. It is more efficient to read the CSR than to compute the address from the hart ID. Signed-off-by: Samuel Holland Reviewed-by: Anup Patel

platform: generic: allwinner: sun20i-d1: Remove duplicated CSR definitions

2024-03-20T05:35:13Z

All T-Head CSRs are already defined in thead/c9xx_encoding.h. Let's reuse the values from there instead of redefining them with a slightly different name. Signed-off-by: Christoph Müllner Reviewed-by: Anup Patel

platform: generic: thead: separate implement of T-HEAD c9xx pmu

2023-11-14T16:23:45Z

Separate the implement of T-HEAD c9xx pmu to allow any platform with c9xx cores can use it. Signed-off-by: Inochi Amaoto Reviewed-by: Anup Patel