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<title>opensbi.git/platform/generic/configs, branch v1.4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/platform/generic/configs?h=v1.4</id>
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<updated>2023-11-16T15:52:27Z</updated>
<entry>
<title>platform: generic: Add Sophgo sg2042 platform support</title>
<updated>2023-11-16T15:52:27Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2023-10-19T23:57:18Z</published>
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<id>urn:sha1:2bfdb9e5c239db4ee39fb5286c6eb0c44641d8da</id>
<content type='text'>
Add Sophgo sg2042 soc support

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>utils/reset: Remove fdt_reset_thead</title>
<updated>2023-11-16T10:55:23Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2023-10-12T08:59:13Z</published>
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<id>urn:sha1:d1e0f7f25b2f1527425942dfc327f1d4a61bbff4</id>
<content type='text'>
In the past, we used fdt_reset_thead to help customers with prototype
verification. However, with the emergence of the Big-little SoC system,
it can no longer meet the demand. Therefore, we use zero_stage_boot
instead of fdt_reset_thead. It cleans up the opensbi code and ends the
disputation of reset_sample's dts.

This patch removes the fdt_reset_thead component and updates the related
doc.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: fix stale TLB entries for th1520/sg2042</title>
<updated>2023-10-04T13:29:54Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2023-09-15T09:39:36Z</published>
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<id>urn:sha1:3669153e06cbae66da28b685c29c8e622d547263</id>
<content type='text'>
The TLB entries remain functional all the time once added in T-HEAD th1520
and Sophgo sg2042 (even if the MMU is then disabled afterwards). If there
are some stale TLB entries that contains the address of SBI, it will cause
unexpected memory access and issue a illegal instruction error. To avoid
this, a TLB flush is needed to drop these TLB entries before any memory
access in the trap handler.

To handle this workaroud, add a custom trap handler with executing TLB flush
first in the T-HEAD platform to fix affected socs.

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: Remove SiFive Test reset driver</title>
<updated>2023-07-31T08:39:24Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T12:50:27Z</published>
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<id>urn:sha1:c2e602707dc0f915e96b8726d63d569cbb6724b4</id>
<content type='text'>
The functionality of SiFive Test reset driver is easily available
through Syscon reset driver so let us remove the SiFive Test driver.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/reset: Add syscon based reboot and poweroff</title>
<updated>2023-07-31T08:39:21Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T12:41:52Z</published>
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<id>urn:sha1:4a344a9b4cc89f64ab5326f428696e15bc2fcdba</id>
<content type='text'>
Let us have common FDT based reset driver for syscon reboot and
poweroff. The device tree bindings for syscon reboot and poweroff
are already available in the Linux kernel sources.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/regmap: Add simple FDT based syscon regmap driver</title>
<updated>2023-07-31T08:39:13Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T08:10:03Z</published>
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<id>urn:sha1:f21d8f7d59114fdf73a56603ff082ce23797d9e5</id>
<content type='text'>
Let us add a simple FDT based system regmap driver which follows the
device tree bindings already defined in the Linux kernel.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/regmap: Add simple FDT based regmap framework</title>
<updated>2023-07-31T08:39:10Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T08:09:57Z</published>
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<id>urn:sha1:8e97275d97bbfb9b990a5e7beafe99bea0e3f538</id>
<content type='text'>
We add a simple FDT based regmap framework which is built on top of
generic regmap library. The phandle of FDT regmap DT node is treated
as unique regmap ID. The FDT based regmap drivers will be probed
on-demand from fdt_regmap_get_by_phandle() and fdt_regmap_get()
called by the regmap client drivers.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/regmap: Add generic regmap access library</title>
<updated>2023-07-31T08:39:08Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-07-21T08:09:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=14a35b0e0e8ceaeb664c5078d6a1fec9e7193c72'/>
<id>urn:sha1:14a35b0e0e8ceaeb664c5078d6a1fec9e7193c72</id>
<content type='text'>
We add generic regmap access library which is independent of
hardware description format (FDT or ACPI). The OpenSBI platform
support or regmap drivers can register regmap instances which
can be discovered by different regmap clients based on the
unique ID of regmap instances.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
<entry>
<title>gpio/desginware: add Synopsys DesignWare APB GPIO support</title>
<updated>2023-07-07T04:34:59Z</updated>
<author>
<name>Ben Dooks</name>
<email>ben.dooks@sifive.com</email>
</author>
<published>2023-03-01T12:25:25Z</published>
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<id>urn:sha1:7828eebaaa773fd83e63471ca27be3f30a0694f6</id>
<content type='text'>
Add a driver for the Synopsys DesignWare APB GPIO IP block found in many
SoCs.

Signed-off-by: Ben Dooks &lt;ben.dooks@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: starfive: add PMIC power ops in JH7110 visionfive2 board</title>
<updated>2023-03-09T15:41:20Z</updated>
<author>
<name>Minda Chen</name>
<email>minda.chen@starfivetech.com</email>
</author>
<published>2023-03-09T06:19:59Z</published>
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<id>urn:sha1:568ea49490d935e01b9a41ef8bb5daf9cb0ef201</id>
<content type='text'>
add reboot and poweroff support. The whole reboot and shutdown
pm op includes shutdown jh7110 pmu device power domain
and access on board pmic register through I2C.

Signed-off-by: Minda Chen &lt;minda.chen@starfivetech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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