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<title>opensbi.git/platform/generic/include, branch release-1.5.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/platform/generic/include?h=release-1.5.x</id>
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<updated>2024-06-18T10:45:22Z</updated>
<entry>
<title>platform: generic: andes: Refine Andes PMA related code</title>
<updated>2024-06-18T10:45:22Z</updated>
<author>
<name>Ben Zong-You Xie</name>
<email>ben717@andestech.com</email>
</author>
<published>2024-05-31T05:19:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=f09f16430ae7b3543616a38df4411fea8f026759'/>
<id>urn:sha1:f09f16430ae7b3543616a38df4411fea8f026759</id>
<content type='text'>
This patch refines the Andes PMA related code. The main change is
refactor andes_pma_[read|write]_cfg() and andes_pma_[read|write]_addr()
into new functions andes_pma_[read|write]_num().

Also, fix some coding style problems.

Signed-off-by: Ben Zong-You Xie &lt;ben717@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: separate T-Head PMU Errata</title>
<updated>2024-05-09T12:39:05Z</updated>
<author>
<name>Yangyu Chen</name>
<email>cyy@cyyself.name</email>
</author>
<published>2024-04-21T15:52:08Z</published>
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<id>urn:sha1:33e21c9476e225064464ad045ce11cf58c2c3204</id>
<content type='text'>
As Guo Ren said from the kernel mailing list [1], future T-Head CPUs,
including the newer versions of T-Head C908, will feature standard
Sscofpmf extension. For these CPUs, T-Head's implementation of PMU
Overflow Interrupts may not needed anymore. In this case, we shouldn't
apply T-Head PMU for all T-Head CPUs. Thus, this patch separated T-Head PMU
errata.

[1] https://lore.kernel.org/linux-riscv/Zh9sUUUT09LZb0MO@gmail.com/

Signed-off-by: Yangyu Chen &lt;cyy@cyyself.name&gt;
Reviewed-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: andes: Change all occurrences of andes45 to andes</title>
<updated>2024-05-09T12:27:51Z</updated>
<author>
<name>Ben Zong-You Xie</name>
<email>ben717@andestech.com</email>
</author>
<published>2024-04-19T03:58:24Z</published>
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<id>urn:sha1:2b93ce0954d594a1c4919f02187bbf7177ed412d</id>
<content type='text'>
To make the framework suit all Andes CPUs, change all occurrences of
andes45 to andes.

In addition, we fix some coding style problems and remove an unused
macro in andes.h.

Signed-off-by: Ben Zong-You Xie &lt;ben717@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: andes: Rename files with the prefix andes45</title>
<updated>2024-05-09T12:26:50Z</updated>
<author>
<name>Ben Zong-You Xie</name>
<email>ben717@andestech.com</email>
</author>
<published>2024-04-19T03:58:23Z</published>
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<id>urn:sha1:f68b3aed9d7bc74f61deb817feeb982809655c51</id>
<content type='text'>
Rename files with the prefix andes45 to andes.

Signed-off-by: Ben Zong-You Xie &lt;ben717@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: andes: Drop andes_pmu_setup()</title>
<updated>2024-03-04T04:50:46Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2024-02-22T09:18:38Z</published>
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<id>urn:sha1:bc366780c2efeb26149774bd17f0afe4ad5c7d62</id>
<content type='text'>
andes_pmu_setup() [1] was intended to populate event mapping from
hardcoded arrays, however, this increases firmware size and we should
just use PMU DT node [2] instead.

Link: https://lists.infradead.org/pipermail/opensbi/2023-November/006032.html [1]
Link: https://github.com/riscv-software-src/opensbi/blob/v1.4/docs/pmu_support.md#example-3 [2]
Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Allow ecall handlers to directly update register state</title>
<updated>2023-12-19T10:26:37Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2023-12-11T15:29:14Z</published>
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<id>urn:sha1:3284bea83368de2ced244d5b2b0eaeaae812a08d</id>
<content type='text'>
Some of the upcoming SBI extensions (such as SSE) will directly
update register state so improve the prototype of ecall handler
to accommodate this. Further, this flexibility allows us to
push the trap redirection from sbi_ecall_handler() to the
sbi_ecall_legacy_handler().

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>platform: andes: Factor out is_andes() helper</title>
<updated>2023-12-06T12:33:12Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-11-30T12:42:09Z</published>
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<id>urn:sha1:009ae4e60221fd17858837460eb26a6a0a56d8f3</id>
<content type='text'>
We will need is_andes(45) in the following patch,
so factor out the code that parses marchid to make
it reusable for checking any Andes CPU variants.

Also improves the comment in ae350_hart_start().

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: andes: Add Andes custom PMU support</title>
<updated>2023-12-06T12:23:45Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-11-30T12:42:05Z</published>
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<id>urn:sha1:1b9e743c3d5de93e2422c0a0a6db269d862aab9a</id>
<content type='text'>
Before the ratification of Sscofpmf, the Andes PMU extension
was designed to support the sampling and filtering with hardware
performance counters (zihpm), it works with the current SBI PMU
extension and Linux SBI PMU driver.

We implement 1) the PMU device callbacks that update the
corresponding bits on custom CSRs, 2) extentions_init() to detect
the hardware support of Andes PMU and initialize the per-hart
PMU related CSR, and 3) pmu_init() to register PMU device and
populate event mappings.

Also define a andes_pmu_setup() function which is in preparation
for adding default PMU mappings in andes_hpm.h

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: Introduce pmu_init() platform override</title>
<updated>2023-12-06T12:19:59Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-11-30T12:42:04Z</published>
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<id>urn:sha1:effd89aa055c7cc6a167f55d333c2b7ba035614b</id>
<content type='text'>
Add pmu_init() platform override, which will be used to register
PMU device and populate event mappings.

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: include: andes45: Add PMU related CSR defines</title>
<updated>2023-12-06T12:01:36Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-11-30T12:42:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/opensbi.git/commit/?id=51ec60c9ea826a26aafb7f85a5ba3a18d4fe2a1e'/>
<id>urn:sha1:51ec60c9ea826a26aafb7f85a5ba3a18d4fe2a1e</id>
<content type='text'>
Add CSR definitions for Andes PMU extension.

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
</content>
</entry>
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